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1. 发明授权

US06809034B2 Method of etching metallic thin film on thin film resistor 失效
公开(公告)号：US06809034B2
公开(公告)日：2004-10-26
申请号：US10131683
申请日：2002-04-24
申请人： Ichiro Ito , Satoshi Shiraki , Tomio Yamamoto , Makoto Ohkawa , Atsumi Takahashi , Yasuaki Tsuzuki , Akito Fukui , Toshio Sakakibara , Takayuki Sugisaka
发明人： Ichiro Ito , Satoshi Shiraki , Tomio Yamamoto , Makoto Ohkawa , Atsumi Takahashi , Yasuaki Tsuzuki , Akito Fukui , Toshio Sakakibara , Takayuki Sugisaka
IPC分类号： H01L21302
CPC分类号： H01L28/24 , H01L21/32139
摘要： An Al film is formed on a barrier metal covering a thin film resistor to have a first opening. A photo-resist is formed on the Al film and in the opening, and is patterned to have a second opening having an opening area smaller than that of the first opening and open in the first opening to expose the barrier metal therefrom. Then, the barrier metal is etched through the second opening. Because the barrier metal is etched from an inner portion more than the opening end of the first opening, under-cut of the barrier metal is prevented.

2. 发明授权

US06279585B1 Etching method and method for manufacturing semiconductor device using the same 有权
标题翻译：使用其制造半导体器件的蚀刻方法和方法
公开(公告)号：US06279585B1
公开(公告)日：2001-08-28
申请号：US09390679
申请日：1999-09-07
申请人： Satoshi Shiraki , Makoto Ohkawa
发明人： Satoshi Shiraki , Makoto Ohkawa
IPC分类号： H01L21302
CPC分类号： H01L27/1203 , H01L21/3211 , H01L21/32134 , H01L21/84
摘要： In a method for manufacturing a semiconductor device, a barrier metal disposed on a metallic thin film for forming a thin film resistor is patterned by wet-etching. The wet-etching produces a residue of the barrier metal. The residue is removed after the oxidation thereof. Accordingly the residue is completely removed. As a result, the patterning of the thin film resistor is stably performed, and short-circuit does not occur to a wiring pattern disposed above the barrier metal.
摘要翻译：在制造半导体器件的方法中，通过湿法刻蚀图案化设置在用于形成薄膜电阻器的金属薄膜上的阻挡金属。湿蚀刻产生阻挡金属的残留物。残余物在氧化后除去。因此残留物被完全除去。结果，稳定地执行薄膜电阻器的图案化，并且在布置在阻挡金属之上的布线图案上不会发生短路。

3. 发明授权

US06770564B1 Method of etching metallic thin film on thin film resistor 失效
标题翻译：在薄膜电阻上蚀刻金属薄膜的方法
公开(公告)号：US06770564B1
公开(公告)日：2004-08-03
申请号：US09361980
申请日：1999-07-28
申请人： Ichiro Ito , Satoshi Shiraki , Tomio Yamamoto , Makoto Ohkawa , Atsumi Takahashi , Yasuaki Tsuzuki , Akito Fukui , Toshio Sakakibara , Takayuki Sugisaka
发明人： Ichiro Ito , Satoshi Shiraki , Tomio Yamamoto , Makoto Ohkawa , Atsumi Takahashi , Yasuaki Tsuzuki , Akito Fukui , Toshio Sakakibara , Takayuki Sugisaka
IPC分类号： H01L21302
CPC分类号： H01L28/24 , H01L21/32139
摘要： An Al film is formed on a barrier metal covering a thin film resistor to have a first opening. A photo-resist is formed on the Al film and in the opening, and is patterned to have a second opening having an opening area smaller than that of the first opening and open in the first opening to expose the barrier metal therefrom. Then, the barrier metal is etched through the second opening. Because the barrier metal is etched from an inner portion more than the opening end of the first opening, under-cut of the barrier metal is prevented.
摘要翻译：在覆盖薄膜电阻器的阻挡金属上形成具有第一开口的Al膜。在Al膜和开口中形成光致抗蚀剂，并且被图案化以具有开口面积小于第一开口的开口面积并在第一开口中开口的第二开口，以暴露出阻挡金属。然后，通过第二开口蚀刻阻挡金属。由于阻挡金属从第一开口的开口端的内部蚀刻，因此防止了阻挡金属的切割。

4. 发明授权

US09136362B2 Semiconductor device having lateral element 有权
标题翻译：具有侧向元件的半导体器件
公开(公告)号：US09136362B2
公开(公告)日：2015-09-15
申请号：US13615912
申请日：2012-09-14
申请人： Takeshi Sakai , Akira Yamada , Shigeki Takahashi , Youichi Ashida , Satoshi Shiraki
发明人： Takeshi Sakai , Akira Yamada , Shigeki Takahashi , Youichi Ashida , Satoshi Shiraki
IPC分类号： H01L29/02 , H01L29/739 , H01L21/765 , H01L29/40 , H01L29/417 , H01L29/861 , H01L29/868 , H01L29/06 , H01L29/08
CPC分类号： H01L29/7394 , H01L21/765 , H01L29/0696 , H01L29/0834 , H01L29/404 , H01L29/405 , H01L29/41725 , H01L29/8611 , H01L29/868
摘要： A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm−3.
摘要翻译：具有横向元件的半导体器件包括半导体衬底，衬底上的第一和第二电极以及从第一电极延伸到第二电极的电阻场板。横向元件在第一和第二电极之间通过电流。施加到第二电极的电压小于施加到第一电极的电压。电阻场板具有与第一端部相对的第一端部和第二端部。第二端部比第一端部更靠近第二电极。第二端部的杂质浓度为1×1018cm-3以上。

5. 发明授权

US08791690B2 Current sensor, inverter circuit, and semiconductor device having the same 有权
公开(公告)号：US08791690B2
公开(公告)日：2014-07-29
申请号：US13150764
申请日：2011-06-01
申请人： Satoshi Shiraki , Norihito Tokura , Shigeki Takahashi , Masahiro Yamamoto , Akira Yamada , Hiroyasu Kudo , Youichi Ashida , Akio Nakagawa
发明人： Satoshi Shiraki , Norihito Tokura , Shigeki Takahashi , Masahiro Yamamoto , Akira Yamada , Hiroyasu Kudo , Youichi Ashida , Akio Nakagawa
IPC分类号： G01R1/20
摘要： A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.

6. 发明授权

US08604513B2 Semiconductor device having SOI substrate 有权
标题翻译：具有SOI衬底的半导体器件
公开(公告)号：US08604513B2
公开(公告)日：2013-12-10
申请号：US12923469
申请日：2010-09-23
申请人： Youichi Ashida , Norihito Tokura , Shigeki Takahashi , Yoshiaki Nakayama , Satoshi Shiraki , Kouji Senda
发明人： Youichi Ashida , Norihito Tokura , Shigeki Takahashi , Yoshiaki Nakayama , Satoshi Shiraki , Kouji Senda
IPC分类号： H01L29/66
CPC分类号： H01L27/1203 , H01L21/76264 , H01L21/84 , H01L29/0634 , H01L29/0657 , H01L29/0692 , H01L29/1608 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/66128 , H01L29/7394 , H01L29/7824 , H01L29/8611
摘要： A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.
摘要翻译：半导体器件包括：SOI衬底; 半导体元件，其具有设置在所述SOI衬底的有源层中的第一和第二杂质层，所述第二杂质层围绕所述第一杂质层; 以及设置在与SOI衬底的嵌入式绝缘膜相邻的有源层的一部分中的多个第一和第二导电类型区域。交替地布置第一和第二导电类型区域。第一和第二导电类型区域具有对应于半导体元件的布局。

7. 发明申请

US20130075877A1 SEMICONDUCTOR DEVICE HAVING LATERAL ELEMENT 有权
标题翻译：具有横向元件的半导体器件
公开(公告)号：US20130075877A1
公开(公告)日：2013-03-28
申请号：US13615912
申请日：2012-09-14
申请人： Takeshi SAKAI , Akira Yamada , Shigeki Takahashi , Youichi Ashida , Satoshi Shiraki
发明人： Takeshi SAKAI , Akira Yamada , Shigeki Takahashi , Youichi Ashida , Satoshi Shiraki
IPC分类号： H01L29/861
CPC分类号： H01L29/7394 , H01L21/765 , H01L29/0696 , H01L29/0834 , H01L29/404 , H01L29/405 , H01L29/41725 , H01L29/8611 , H01L29/868
摘要： A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm−3.
摘要翻译：具有横向元件的半导体器件包括半导体衬底，衬底上的第一和第二电极以及从第一电极延伸到第二电极的电阻场板。横向元件在第一和第二电极之间通过电流。施加到第二电极的电压小于施加到第一电极的电压。电阻场板具有与第一端部相对的第一端部和第二端部。第二端部比第一端部更靠近第二电极。第二端部的杂质浓度为1×1018cm-3以上。

8. 发明授权

US07821069B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07821069B2
公开(公告)日：2010-10-26
申请号：US12010111
申请日：2008-01-22
申请人： Satoshi Shiraki , Hiroyuki Ban , Akira Yamada
发明人： Satoshi Shiraki , Hiroyuki Ban , Akira Yamada
IPC分类号： H01L23/62
CPC分类号： H01L27/1203 , H01L21/84 , H01L27/0629 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: n transistor elements; n resistive elements; and n capacitive elements, each kind of elements coupled in series between the first and second terminals. The gate of each transistor element has a gate pad, and each transistor element includes transistor pads disposed on both sides. Each resistive element includes resistive pads disposed on both sides. Each capacitive element includes capacitive pads disposed on both sides. The gate pad other than the first stage transistor element, a corresponding resistive pad, and a corresponding capacitive pad are electrically coupled. One transistor pad, one resistive pad, and one capacitive pad in the first stage are electrically coupled. One transistor pad, one resistive pad, and one capacitive pad in the n-th stage are electrically coupled.
摘要翻译：半导体器件包括：n个晶体管元件; n电阻元件; 和n个电容元件，每种元件串联在第一和第二端子之间。每个晶体管元件的栅极具有栅极焊盘，并且每个晶体管元件包括设置在两侧的晶体管焊盘。每个电阻元件包括设置在两侧的电阻垫。每个电容元件包括设置在两侧的电容焊盘。除了第一级晶体管元件之外的栅极焊盘，对应的电阻焊盘和对应的电容焊盘是电耦合的。第一级中的一个晶体管焊盘，一个电阻焊盘和一个电容焊盘电耦合。第n级中的一个晶体管焊盘，一个电阻焊盘和一个电容焊盘电耦合。

9. 发明申请

US20100176480A1 Semiconductor device, method for manufacturing the same, and multilayer substrate having the same 有权
标题翻译：半导体装置及其制造方法以及具有该半导体装置的多层基板
公开(公告)号：US20100176480A1
公开(公告)日：2010-07-15
申请号：US12654707
申请日：2009-12-29
申请人： Kouji Senda , Satoshi Shiraki , Yukihiro Maeda , Shinichi Hirose , Tetsuo Fujii , Takashi Nakano
发明人： Kouji Senda , Satoshi Shiraki , Yukihiro Maeda , Shinichi Hirose , Tetsuo Fujii , Takashi Nakano
IPC分类号： H01L27/06 , H01L21/78
CPC分类号： H01L21/84 , H01L23/3107 , H01L23/4951 , H01L23/49551 , H01L24/27 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/83191 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for manufacturing a semiconductor device includes: preparing a wafer formed of a SOI substrate; forming a circuit portion in a principal surface portion; removing a support substrate of the SOI substrate; fixing an insulation member on a backside of a semiconductor layer so as to be opposite to the circuit portion; dicing the wafer and dividing the wafer into multiple chips; arranging a first conductive member on the insulation member so as to be opposite to a part of the low potential reference circuit, and arranging a second conductive member on the insulation member so as to be opposite to a part of the high potential reference circuit; and coupling the first conductive member with a first part of the low potential reference circuit, and coupling the second conductive member with a second part of the high potential reference circuit.
摘要翻译：一种制造半导体器件的方法包括：制备由SOI衬底形成的晶片; 在主表面部分形成电路部分; 去除SOI衬底的支撑衬底; 将绝缘构件固定在半导体层的背面以与电路部分相对; 切割晶片并将晶片分成多个芯片; 在所述绝缘构件上设置与所述低电位基准电路的一部分相对的第一导电构件，并且在所述绝缘构件上配置与所述高电位基准电路的一部分相反的第二导电构件; 以及将所述第一导电构件与所述低电位参考电路的第一部分耦合，以及将所述第二导电构件与所述高电位参考电路的第二部分耦合。

10. 发明申请

US20050001265A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050001265A1
公开(公告)日：2005-01-06
申请号：US10864518
申请日：2004-06-10
申请人： Satoshi Shiraki , Yoshiaki Nakayama , Shoji Mizuno , Takashi Nakano , Akira Yamada
发明人： Satoshi Shiraki , Yoshiaki Nakayama , Shoji Mizuno , Takashi Nakano , Akira Yamada
IPC分类号： H01L21/76 , H01L21/336 , H01L21/763 , H01L21/8234 , H01L27/08 , H01L29/10 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/76
CPC分类号： H01L29/7824 , H01L21/26586 , H01L21/76286 , H01L21/763 , H01L21/823418 , H01L21/823456 , H01L21/823462 , H01L21/823481 , H01L29/0696 , H01L29/1041 , H01L29/105 , H01L29/1095 , H01L29/4236 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/66681 , H01L29/66795 , H01L29/7825 , H01L29/7831 , H01L29/7835
摘要： A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.
摘要翻译：半导体器件包括：具有主平面的半导体衬底; 设置在主平面上的基部区域; 源区域，其设置在所述基底区域中的所述主平面上，以比所述基底区域浅; 漏极区域，设置在所述主平面上，并且与所述基极区域间隔开; 设在主平面上的沟槽; 通过沟槽栅极绝缘膜设置在沟槽中的沟槽栅电极; 通过平面栅极绝缘膜设置在半导体衬底的主平面上的平面栅电极; 以及杂质扩散区域，其具有高浓度的杂质，并且设置在基极区域的一部分中，作为面向平面栅电极的沟道区域。

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