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1. 发明授权

US09431383B2 Integrated circuit, semiconductor device based on integrated circuit, and standard cell library 有权
标题翻译：集成电路，基于集成电路的半导体器件和标准单元库
公开(公告)号：US09431383B2
公开(公告)日：2016-08-30
申请号：US14801121
申请日：2015-07-16
申请人： Sang-hoon Baek , Sang-kyu Oh , Jung-ho Do , Sun-young Park , Seung-young Lee , Hyo-sig Won
发明人： Sang-hoon Baek , Sang-kyu Oh , Jung-ho Do , Sun-young Park , Seung-young Lee , Hyo-sig Won
IPC分类号： H01L21/70 , H01L27/02 , H01L27/092 , H01L29/423 , H01L29/78 , H01L27/118
CPC分类号： H01L27/11807 , H01L27/0207 , H01L27/0924 , H01L29/42384 , H01L29/6681 , H01L29/785 , H01L2027/11875
摘要： An integrated circuit (IC) may include at least one cell including a plurality of conductive lines that extend in a first direction and are in parallel to each other in a second direction that is perpendicular to the first direction, first contacts respectively disposed at two sides of at least one conductive line from among the plurality of conductive lines, and a second contact disposed on the at least one conductive line and the first contacts and forming a single node by being electrically connected to the at least one conductive line and the first contacts.
摘要翻译：集成电路（IC）可以包括至少一个单元，其包括在垂直于第一方向的第二方向上在第一方向上延伸并彼此平行的多条导线，第一触点分别设置在两侧的至少一条导线，以及设置在所述至少一个导电线上的第二触点，并且所述第一触点通过电连接到所述至少一个导线和所述第一触点而形成单个节点。

2. 发明申请

US20160300839A1 INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE 有权
标题翻译：集成电路和半导体器件
公开(公告)号：US20160300839A1
公开(公告)日：2016-10-13
申请号：US15093504
申请日：2016-04-07
申请人： Ha-young Kim , Sung-we Cho , Tae-joong Song , Sang-hoon Baek
发明人： Ha-young Kim , Sung-we Cho , Tae-joong Song , Sang-hoon Baek
IPC分类号： H01L27/092 , H01L23/522 , H01L27/02 , H01L23/528
CPC分类号： H01L27/0924 , G06F17/5077 , H01L23/5226 , H01L23/528 , H01L23/5286 , H01L27/0207 , H01L27/092
摘要： An embodiment includes an integrated circuit comprising a standard cell, the standard cell comprising: first and second active regions having different conductivity types and extending in a first direction; first, second, and third conductive lines extending over the first and second active regions in a second direction substantially perpendicular to the first direction, and disposed parallel to each other; and a cutting layer extending in the first direction between the first and second active regions and separating the first conductive line into a first upper conductive line and a first lower conductive line, the second conductive line into a second upper conductive line and a second lower conductive line, and the third conductive line into a third upper conductive line and a third lower conductive line; wherein: the first upper conductive line and the third lower conductive line are electrically connected together; and the second upper conductive line and the second lower conductive line are electrically connected together.
摘要翻译：实施例包括包括标准单元的集成电路，该标准单元包括：具有不同导电类型并沿第一方向延伸的第一和第二有源区; 第一，第二和第三导电线在基本上垂直于第一方向的第二方向上在第一和第二有源区上延伸并彼此平行设置; 以及切割层，其在所述第一和第二有源区域之间沿所述第一方向延伸，并且将所述第一导电线分离成第一上导电线和第一下导电线，所述第二导线变为第二上导电线和第二下导电线线和第三导线插入第三上导电线和第三下导电线; 其中：所述第一上导电线和所述第三下导电线电连接在一起; 并且第二上导线和第二下导电线电连接在一起。

3. 发明授权

US09583493B2 Integrated circuit and semiconductor device 有权
标题翻译：集成电路和半导体器件
公开(公告)号：US09583493B2
公开(公告)日：2017-02-28
申请号：US15093504
申请日：2016-04-07
申请人： Ha-young Kim , Sung-we Cho , Tae-joong Song , Sang-hoon Baek
发明人： Ha-young Kim , Sung-we Cho , Tae-joong Song , Sang-hoon Baek
IPC分类号： H01L23/52 , H01L27/092 , H01L23/528 , H01L23/522 , H01L27/02
CPC分类号： H01L27/0924 , G06F17/5077 , H01L23/5226 , H01L23/528 , H01L23/5286 , H01L27/0207 , H01L27/092
摘要： An embodiment includes an integrated circuit comprising a standard cell, the standard cell comprising: first and second active regions having different conductivity types and extending in a first direction; first, second, and third conductive lines extending over the first and second active regions in a second direction substantially perpendicular to the first direction, and disposed parallel to each other; and a cutting layer extending in the first direction between the first and second active regions and separating the first conductive line into a first upper conductive line and a first lower conductive line, the second conductive line into a second upper conductive line and a second lower conductive line, and the third conductive line into a third upper conductive line and a third lower conductive line; wherein: the first upper conductive line and the third lower conductive line are electrically connected together; and the second upper conductive line and the second lower conductive line are electrically connected together.
摘要翻译：实施例包括包括标准单元的集成电路，该标准单元包括：具有不同导电类型并沿第一方向延伸的第一和第二有源区; 第一，第二和第三导电线在基本上垂直于第一方向的第二方向上在第一和第二有源区上延伸并彼此平行设置; 以及切割层，其在所述第一和第二有源区域之间沿所述第一方向延伸，并且将所述第一导电线分离成第一上导电线和第一下导电线，所述第二导线变为第二上导电线和第二下导电线线和第三导线插入第三上导电线和第三下导电线; 其中：所述第一上导电线和所述第三下导电线电连接在一起; 并且第二上导线和第二下导电线电连接在一起。

4. 发明授权

US08869089B2 Semiconductor integrated circuit and method of designing the same 有权
标题翻译：半导体集成电路及其设计方法
公开(公告)号：US08869089B2
公开(公告)日：2014-10-21
申请号：US13708066
申请日：2012-12-07
申请人： Sang-hoon Baek , Jae-woo Seo
发明人： Sang-hoon Baek , Jae-woo Seo
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5068
摘要： According to example embodiments of inventive concepts, a method of designing a semiconductor integrated circuit includes: creating a marking layer that indicates at least one semiconductor device of a plurality of semiconductor devices that is to be changed in at least one of width, height, and space thereof from an adjacent semiconductor device; and applying the marking layer to a previously created layout to generate a new library of the at least one semiconductor device that is changed in at least one of width, height, and space from an adjacent semiconductor device. The marking layer may be based on a change in characteristics of the at least one semiconductor device of the plurality of semiconductor devices.
摘要翻译：根据发明构思的示例性实施例，一种设计半导体集成电路的方法包括：创建标记层，其指示要在宽度，高度和/或宽度中的至少一个中改变的多个半导体器件中的至少一个半导体器件其相邻半导体器件的空间; 以及将所述标记层应用于先前创建的布局以生成在与相邻半导体器件的宽度，高度和空间中的至少一个中改变的所述至少一个半导体器件的新库。标记层可以基于多个半导体器件中的至少一个半导体器件的特性变化。

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