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    • 6. 发明授权
    • Test device and semiconductor integrated circuit device
    • 测试器件和半导体集成电路器件
    • US08508017B2
    • 2013-08-13
    • US13067833
    • 2011-06-29
    • Sang-Jin LeeGin-Kyu Lee
    • Sang-Jin LeeGin-Kyu Lee
    • H01L21/70H01L23/58
    • G01R31/2884G01R31/025G11C11/41G11C29/02G11C29/24G11C29/50008H01L22/34
    • Test devices and integrated circuits with improved productivity are provided. In accordance with example embodiments, a test device may include a first test region with a first test element and a second test region with a second test element defined on a semiconductor substrate. The first test element may include a pair of first secondary test regions in the semiconductor substrate and a pair of first test gate lines. One of the first test gate lines may overlap one of the first secondary test regions and the other first test gate line may overlap the other first secondary test region. The second test element may include structures corresponding to the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions and the pair of first test gate lines.
    • 提供了提高生产率的测试设备和集成电路。 根据示例实施例,测试设备可以包括具有第一测试元件的第一测试区域和具有限定在半导体衬底上的第二测试元件的第二测试区域。 第一测试元件可以包括半导体衬底中的一对第一次级测试区域和一对第一测试栅极线。 第一测试栅极线之一可以与第一次级测试区域中的一个重叠,而另一个第一测试栅极线可能与另一个第一次级测试区域重叠。 第二测试元件可以包括对应于第一测试元件的结构,除了第二测试元件不包括对应于该对第一次级测试区域对和该对第一测试栅极线对的结构。
    • 8. 发明授权
    • Test device and semiconductor integrated circuit device
    • 测试器件和半导体集成电路器件
    • US08258805B2
    • 2012-09-04
    • US12458535
    • 2009-07-15
    • Sang-Jin LeeGin-Kyu Lee
    • Sang-Jin LeeGin-Kyu Lee
    • G01R31/26H01L23/58
    • H01L22/34G11C11/41G11C29/50
    • A test device and a semiconductor integrated circuit are provided. The test device may include a first test region and a second test region defined on a semiconductor substrate. The first test region may include a first test element and the second region may include a second test element. The first test element may include a pair of first secondary test regions in the semiconductor substrate extending in a first direction. The second test element may include structures corresponding to the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions.
    • 提供了一种测试装置和半导体集成电路。 测试装置可以包括限定在半导体衬底上的第一测试区域和第二测试区域。 第一测试区域可以包括第一测试元件,并且第二区域可以包括第二测试元件。 第一测试元件可以包括在第一方向上延伸的半导体衬底中的一对第一次级测试区域。 第二测试元件可以包括对应于第一测试元件的结构,除了第二测试元件不包括与该对第一次测试区对应的结构。
    • 10. 发明授权
    • Test device and semiconductor integrated circuit device
    • 测试器件和半导体集成电路器件
    • US07994811B2
    • 2011-08-09
    • US12385117
    • 2009-03-31
    • Sang-Jin LeeGin-Kyu Lee
    • Sang-Jin LeeGin-Kyu Lee
    • G01R31/02
    • G01R31/2884G01R31/025G11C11/41G11C29/02G11C29/24G11C29/50008H01L22/34
    • Test devices and integrated circuits with improved productivity are provided. In accordance with example embodiments, a test device may include a first test region with a first test element and a second test region with a second test element defined on a semiconductor substrate. The first test element may include a pair of first secondary test regions in the semiconductor substrate and a pair of first test gate lines. One of the first test gate lines may overlap one of the first secondary test regions and the other first test gate line may overlap the other first secondary test region. The second test element may include structures corresponding to the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions and the pair of first test gate lines.
    • 提供了提高生产率的测试设备和集成电路。 根据示例实施例,测试设备可以包括具有第一测试元件的第一测试区域和具有限定在半导体衬底上的第二测试元件的第二测试区域。 第一测试元件可以包括半导体衬底中的一对第一次级测试区域和一对第一测试栅极线。 第一测试栅极线之一可以与第一次级测试区域中的一个重叠,而另一个第一测试栅极线可能与另一个第一次级测试区域重叠。 第二测试元件可以包括对应于第一测试元件的结构,除了第二测试元件不包括对应于该对第一次级测试区域对和该对第一测试栅极线对的结构。