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1. 发明授权

US07876613B2 Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards 有权
标题翻译：具有单个锁存结构和相关编程方法，系统和存储卡的多位闪存器件
公开(公告)号：US07876613B2
公开(公告)日：2011-01-25
申请号：US12182274
申请日：2008-07-30
申请人： Sang-Chul Kang , Ho-kil Lee , Jin-Yub Lee
发明人： Sang-Chul Kang , Ho-kil Lee , Jin-Yub Lee
IPC分类号： G11C11/34 , G11C16/04 , G11C16/06
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/3454 , G11C2211/5621 , G11C2211/5642
摘要： Multi-bit flash memory devices are provided. The multi-bit flash memory device includes an array of memory cells and a page buffer block including page buffers. Each of the page buffers has a single latch structure and performs a write operation with respect to memory cells according to loaded data. A buffer random access memory (RAM) is configured to store program data provided from an external host device during a multi-bit program operation. Control logic is provided that is configured to control the page buffer block and the buffer RAM so that program data stored in the buffer RAM is reloaded into the page buffer block whenever data programmed before the multi-bit program operation is compared with data to be currently programmed. The control logic is configured to store data to be programmed next in the buffer RAM before the multi-bit program operation is completed.
摘要翻译：提供多位闪存设备。该多位闪存器件包括存储单元阵列和包括页缓冲器的页缓冲块。每个页面缓冲器具有单个锁存结构，并且根据加载的数据对存储器单元执行写入操作。缓冲随机存取存储器（RAM）被配置为在多位程序操作期间存储从外部主机设备提供的程序数据。提供了控制逻辑，其被配置为控制页面缓冲区块和缓冲器RAM，使得存储在缓冲器RAM中的程序数据被重新加载到页面缓冲器块中，每当在多位程序操作之前编程的数据与当前的数据进行比较程序。控制逻辑被配置为在多位程序操作完成之前存储要在缓冲RAM中接下来被编程的数据。

2. 发明授权

US07643339B2 Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards 有权
标题翻译：具有单个锁存结构和相关编程方法，系统和存储卡的多位闪存器件
公开(公告)号：US07643339B2
公开(公告)日：2010-01-05
申请号：US11801792
申请日：2007-05-11
申请人： Ho-kil Lee , Jin-Yup Lee
发明人： Ho-kil Lee , Jin-Yup Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621 , G11C2211/5642 , G11C2216/14
摘要： A multi-bit non-volatile memory device is provided. The memory device includes a memory cell array including a plurality of memory cells. A page buffer is electrically coupled to the memory cell array. The page buffer includes a plurality of latches configured to store a first bit of multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. A buffer random access memory (RAM) is electrically coupled to the page buffer. The buffer RAM is configured to store a second bit of the multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. Related systems, memory cards and methods are also provided.
摘要翻译：提供了一种多位非易失性存储器件。存储器件包括包括多个存储单元的存储单元阵列。页面缓冲器电耦合到存储单元阵列。页面缓冲器包括多个锁存器，其被配置为存储要写入或从存储器单元阵列的多个存储器单元之一读出的多位数据的第一位。缓冲随机存取存储器（RAM）电耦合到页缓冲器。缓冲RAM被配置为存储要写入或从存储单元阵列的多个存储单元之一读出的多位数据的第二位。还提供了相关系统，存储卡和方法。

3. 发明申请

US20070268748A1 Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards 有权
标题翻译：具有单个锁存结构和相关编程方法，系统和存储卡的多位闪存器件
公开(公告)号：US20070268748A1
公开(公告)日：2007-11-22
申请号：US11801792
申请日：2007-05-11
申请人： Ho-kil Lee , Jin-Yup Lee
发明人： Ho-kil Lee , Jin-Yup Lee
IPC分类号： G11C14/00 , G11C16/04 , G11C11/34
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621 , G11C2211/5642 , G11C2216/14
摘要： A multi-bit non-volatile memory device is provided. The memory device includes a memory cell array including a plurality of memory cells. A page buffer is electrically coupled to the memory cell array. The page buffer includes a plurality of latches configured to store a first bit of multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. A buffer random access memory (RAM) is electrically coupled to the page buffer. The buffer RAM is configured to store a second bit of the multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. Related systems, memory cards and methods are also provided.
摘要翻译：提供了一种多位非易失性存储器件。存储器件包括包括多个存储单元的存储单元阵列。页面缓冲器电耦合到存储单元阵列。页面缓冲器包括多个锁存器，其被配置为存储要写入或从存储器单元阵列的多个存储器单元之一读出的多位数据的第一位。缓冲随机存取存储器（RAM）电耦合到页缓冲器。缓冲RAM被配置为存储要写入或从存储单元阵列的多个存储单元之一读出的多位数据的第二位。还提供了相关系统，存储卡和方法。

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