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1. 发明申请

US20070166918A1 NON-VOLATILE MEMORY DEVICE, AND MANUFACTURING METHOD AND PROGRAMMING METHOD THEREOF 审中-公开
标题翻译：非易失性存储器件及其制造方法及其编程方法
公开(公告)号：US20070166918A1
公开(公告)日：2007-07-19
申请号：US11618585
申请日：2006-12-29
申请人： Sang Hyun Oh , Jung Ahn , II Young Kwon
发明人： Sang Hyun Oh , Jung Ahn , II Young Kwon
IPC分类号： G11C16/04 , H01L29/788 , H01L21/336
CPC分类号： H01L27/115 , G11C16/0483 , H01L27/11521 , H01L27/11524
摘要： A non-volatile memory device includes a plurality of select lines and a plurality of word lines formed over a semiconductor substrate, a contact plug formed between the select lines, and a conductive interference shielding line formed between the select line and a word line adjacent to the select line and isolated from the semiconductor substrate. A method of manufacturing a non-volatile memory device includes the steps of providing a semiconductor substrate in which a plurality of select lines and a plurality of word lines are formed, forming a first insulating layer over the semiconductor substrate including the select lines and the word lines, removing the first insulating layer between the select lines, forming a conductive interference shielding line over the first insulating layer between the select line and a word line adjacent to the select line, forming a second insulating layer over the semiconductor substrate including the conductive interference shielding line, etching the second insulating layer to expose the semiconductor substrate and the conductive interference shielding line between the select lines, thus forming a contact hole, and forming a contact plug within the contact hole.
摘要翻译：非易失性存储器件包括多个选择线和形成在半导体衬底上的多个字线，形成在选择线之间的接触插塞和形成在选择线和与之相邻的字线之间的导电干扰屏蔽线选择线并与半导体衬底分离。一种制造非易失性存储器件的方法包括以下步骤：提供半导体衬底，其中形成多条选择线和多条字线，在包括选择线和字的半导体衬底之上形成第一绝缘层在所述选择线之间移除所述第一绝缘层，在所述选择线和与所述选择线相邻的字线之间的所述第一绝缘层上方形成导电干扰屏蔽线，在所述半导体衬底上形成包括所述导电干扰的第二绝缘层蚀刻第二绝缘层以暴露半导体衬底和选择线之间的导电干扰屏蔽线，从而形成接触孔，并在接触孔内形成接触插塞。

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