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1. 发明申请

US20120246531A1 SYSTEM AND METHOD FOR DEBUGGING SCAN CHAINS 有权
标题翻译：用于调查扫描链的系统和方法
公开(公告)号：US20120246531A1
公开(公告)日：2012-09-27
申请号：US13071512
申请日：2011-03-25
申请人： Sandeep Jain , Nikila Krishnamoorthy , Abhishek Chaudhary , Nipun Mahajan , Saurabh Chauhan
发明人： Sandeep Jain , Nikila Krishnamoorthy , Abhishek Chaudhary , Nipun Mahajan , Saurabh Chauhan
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G01R31/318547 , G01R31/318558
摘要： Scan chains are used to detect faults in integrated circuits but with the size of today's circuits, it is difficult to detect and locate scan chain faults, especially when the scan data in and scan data out have been compressed. A method for debugging scan chains includes selecting a scan chain for debugging using a scan chain selection block and then providing scan test vectors to the selected scan chain. The scan test vectors undergo various scan test stages to generate scan response vectors. The scan response vectors are compared with ideal response vectors to identify a failing scan chain.
摘要翻译：扫描链用于检测集成电路中的故障，但随着当今电路的大小，难以检测和定位扫描链故障，特别是当扫描数据输入和扫描数据输出被压缩时。用于调试扫描链的方法包括使用扫描链选择块选择用于调试的扫描链，然后向所选择的扫描链提供扫描测试向量。扫描测试矢量经历各种扫描测试阶段以产生扫描响应矢量。将扫描响应向量与理想响应向量进行比较，以识别故障扫描链。

2. 发明授权

US08458541B2 System and method for debugging scan chains 有权
标题翻译：用于调试扫描链的系统和方法
公开(公告)号：US08458541B2
公开(公告)日：2013-06-04
申请号：US13071512
申请日：2011-03-25
申请人： Sandeep Jain , Nikila Krishnamoorthy , Abhishek Chaudhary , Nipun Mahajan , Saurabh Chauhan
发明人： Sandeep Jain , Nikila Krishnamoorthy , Abhishek Chaudhary , Nipun Mahajan , Saurabh Chauhan
IPC分类号： G01R31/28
CPC分类号： G01R31/318547 , G01R31/318558
摘要： Scan chains are used to detect faults in integrated circuits but with the size of today's circuits, it is difficult to detect and locate scan chain faults, especially when the scan data in and scan data out have been compressed. A method for debugging scan chains includes selecting a scan chain for debugging using a scan chain selection block and then providing scan test vectors to the selected scan chain. The scan test vectors undergo various scan test stages to generate scan response vectors. The scan response vectors are compared with ideal response vectors to identify a failing scan chain.
摘要翻译：扫描链用于检测集成电路中的故障，但随着当今电路的大小，难以检测和定位扫描链故障，特别是当扫描数据输入和扫描数据输出被压缩时。用于调试扫描链的方法包括使用扫描链选择块选择用于调试的扫描链，然后向所选择的扫描链提供扫描测试向量。扫描测试矢量经历各种扫描测试阶段以产生扫描响应矢量。将扫描响应向量与理想响应向量进行比较，以识别故障扫描链。

3. 发明申请

US20060248422A1 Sequential Scan Based Techniques to Test Interface Between Modules Designed to Operate at Different Frequencies 有权
标题翻译：基于扫描的连续扫描技术来测试以不同频率操作的模块之间的接口
公开(公告)号：US20060248422A1
公开(公告)日：2006-11-02
申请号：US11160235
申请日：2005-06-15
申请人： Naga Satya Puvvada , Nikila Krishnamoorthy , Sandeep Jain , Jais Abraham
发明人： Naga Satya Puvvada , Nikila Krishnamoorthy , Sandeep Jain , Jais Abraham
IPC分类号： G01R31/28
CPC分类号： G01R31/318594
摘要： According to an aspect of present invention, modules designed to operate with different frequency in functional (normal) mode are tested using a sequential scan based technique at the respective frequencies. In one embodiment the interface logic connecting the two modules is tested for at-speed performance (i.e., the same speed at which the interface would be operated in functional mode during normal operation).
摘要翻译：根据本发明的一个方面，使用基于顺序扫描的技术在各个频率上测试被设计为在功能（正常）模式下以不同频率工作的模块。在一个实施例中，连接两个模块的接口逻辑被测试为高速性能（即，在正常操作期间接口将在功能模式下操作的相同速度）。

4. 发明授权

US07421634B2 Sequential scan based techniques to test interface between modules designed to operate at different frequencies 有权
标题翻译：基于扫描的基于扫描的技术，用于测试设计为在不同频率下工作的模块之间的接口
公开(公告)号：US07421634B2
公开(公告)日：2008-09-02
申请号：US11160235
申请日：2005-06-15
申请人： Naga Satya Srikanth Puvvada , Nikila Krishnamoorthy , Sandeep Jain , Jais Abraham
发明人： Naga Satya Srikanth Puvvada , Nikila Krishnamoorthy , Sandeep Jain , Jais Abraham
IPC分类号： G01R31/28
CPC分类号： G01R31/318594
摘要： According to an aspect of present invention, modules designed to operate with different frequency in functional (normal) mode are tested using a sequential scan based technique at the respective frequencies. In one embodiment the interface logic connecting the two modules is tested for at-speed performance (i.e., the same speed at which the interface would be operated in functional mode during normal operation).
摘要翻译：根据本发明的一个方面，使用基于顺序扫描的技术在各个频率上测试被设计为在功能（正常）模式下以不同频率工作的模块。在一个实施例中，连接两个模块的接口逻辑被测试为高速性能（即，在正常操作期间接口将在功能模式下操作的相同速度）。

5. 发明申请

US20120137187A1 SYSTEM AND METHOD FOR SCAN TESTING INTEGRATED CIRCUITS 审中-公开
标题翻译：用于扫描测试集成电路的系统和方法
公开(公告)号：US20120137187A1
公开(公告)日：2012-05-31
申请号：US12954907
申请日：2010-11-28
申请人： Sandeep Jain , Abhishek Chaudhary , Supreet Jeloka
发明人： Sandeep Jain , Abhishek Chaudhary , Supreet Jeloka
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/318566
摘要： A system for scan testing an IC includes one or more scan registers, one or more scan-in pads, one or more scan-out pads, and one or more comparators. Scan test data is transmitted from the scan-in pads to the scan registers. The functional response obtained from the scan test is transmitted to the comparator. The scan-out pad transmits the expected data to the comparator. The comparator compares the expected data and the functional response data and the comparison result is stored. The test result data is transmitted at positive and negative edges of the test clock signal.
摘要翻译：用于对IC进行扫描测试的系统包括一个或多个扫描寄存器，一个或多个扫描焊盘，一个或多个扫描输出焊盘和一个或多个比较器。扫描测试数据从扫描焊盘传输到扫描寄存器。从扫描测试获得的功能响应被传送到比较器。扫描输出板将期望的数据发送到比较器。比较器比较预期数据和功能响应数据，并存储比较结果。测试结果数据在测试时钟信号的正和负边沿传输。

6. 发明授权

US10836765B2 Process for the preparation of valacyclovir 有权
公开(公告)号：US10836765B2
公开(公告)日：2020-11-17
申请号：US16081944
申请日：2017-02-24
申请人： AUROBINDO PHARMA LTD , Sandeep Jain , Komel Ansari , Subramanyam Maddala , Sivakumaran Meenakshisundaram
发明人： Sandeep Jain , Komel Ansari , Subramanyam Maddala , Sivakumaran Meenakshisundaram
IPC分类号： C07D473/18 , B01J19/00
CPC分类号： C07D473/18 , B01J19/0093 , B01J2219/00033
摘要： The present invention relates to an improved process for the preparation of Valacyclovir or pharmaceutically acceptable salts thereof, which comprises reaction of amine-protected Valacyclovir or its salt with deprotecting agent in a continuous flow reactor.

7. 发明授权

US10505871B1 Future messaging maximizing contextual relevancy and minimizing information overload based distractions 有权
公开(公告)号：US10505871B1
公开(公告)日：2019-12-10
申请号：US15827172
申请日：2017-11-30
申请人： Sandeep Jain
发明人： Sandeep Jain
IPC分类号： H04L12/58
CPC分类号： H04L51/04 , H04L51/12 , H04L51/24 , H04L51/28
摘要： A messaging server with a future message storage space for future messages, each being a sender created message not yet delivered to a recipient that has an associated sender specified message delivery time. Recipient specific delivery block details are specified for a set of delivery blocks for future messages. The future messages are received processed and stored. Until the respective sender specified message delivery time a respective one of the set of senders is able to retract and edit a corresponding one of the future messages. Future messages are delivered at the delivery time consistent with the delivery blocks. After delivery the sender is unable to retract and edit a corresponding delivered message. Future messages do not alert a recipient of arrival until the sender established delivery time, which minimizes cognitive distractions and provides the sender with notice for anticipating a time of response, without overly distracting the recipient.

8. 发明授权

US09229890B2 Method and a system for integrating data from a source to a destination 有权
标题翻译：方法和用于将数据从源到目标集成的系统
公开(公告)号：US09229890B2
公开(公告)日：2016-01-05
申请号：US13457497
申请日：2012-04-27
申请人： Sandeep Jain , Prakash Chandra Tiwary
发明人： Sandeep Jain , Prakash Chandra Tiwary
IPC分类号： G06F17/30 , G06F13/22
CPC分类号： G06F13/22 , G06F11/2082 , G06F17/30008 , G06F17/30575
摘要： The embodiments herein provide a system and a method for integrating a data from a source to a destination. The method comprises generating a global-id, setting an event-id corresponding to an entity id in the global id, polling a data from a source, sorting changes of a source system based on a time of update and an entity id, creating and comparing an old as of state value and a new as of state value for each field for each update in the entity in the source and destination to detect a conflict on an entity, sending a time of update in the entity and a revision id of a change to the destination, comparing the global id with an event id for each entity at the destination to detect a presence of an entity in the destination and processing an entity at the destination based an event id.
摘要翻译：这里的实施例提供了用于将来自源到目的地的数据进行集成的系统和方法。该方法包括生成global-id，设置与全局id中的实体id相对应的事件id，轮询来自源的数据，根据更新时间和实体id对源系统的改变进行排序，创建和将来自源和目的地中的实体中的每个更新的每个字段的状态值和状态值的新的状态值进行比较以检测实体上的冲突，在实体中发送更新时间和修改ID 将目的地的每个实体的全局id与事件ID进行比较，以检测目的地中的实体的存在并根据事件ID处理目的地的实体。

9. 发明授权

US09053035B1 Multi-threaded system for performing atomic binary translations 有权
标题翻译：用于执行原子二进制翻译的多线程系统
公开(公告)号：US09053035B1
公开(公告)日：2015-06-09
申请号：US14088446
申请日：2013-11-25
申请人： Ashish Mathur , Sandeep Jain
发明人： Ashish Mathur , Sandeep Jain
IPC分类号： G06F12/02 , G06F12/08
CPC分类号： G06F9/3004 , G06F8/45 , G06F8/52 , G06F9/45558
摘要： A multi-threaded binary translation system performs atomic operations by a thread, such operations include processing a load linked instruction and a store conditional instruction. The store conditional instruction updates data stored in a shared memory address only when at least three conditions are satisfied. The conditions are: a copy of a load linked shared memory address of the load linked instruction is the same as the store conditional shared memory address, a reservation flag indicates that the thread has a valid reservation, and the copy of data stored by the load linked instruction is the same as data stored in the store conditional shared memory address.
摘要翻译：多线程二进制翻译系统通过线程执行原子操作，这样的操作包括处理加载链接指令和存储条件指令。存储条件指令仅在满足至少三个条件时更新存储在共享存储器地址中的数据。条件是：负载链接指令的负载链接共享存储器地址的副本与存储条件共享存储器地址相同，保留标志指示线程具有有效预留，以及负载存储的数据副本链接指令与存储在存储条件共享存储器地址中的数据相同。

10. 发明申请

US20150149725A1 MULTI-THREADED SYSTEM FOR PERFORMING ATOMIC BINARY TRANSLATIONS 有权
标题翻译：用于执行原子二进制翻译的多线程系统
公开(公告)号：US20150149725A1
公开(公告)日：2015-05-28
申请号：US14088446
申请日：2013-11-25
申请人： Ashish Mathur , Sandeep Jain
发明人： Ashish Mathur , Sandeep Jain
IPC分类号： G06F12/08
CPC分类号： G06F9/3004 , G06F8/45 , G06F8/52 , G06F9/45558
摘要： A multi-threaded binary translation system performs atomic operations by a thread, such operations include processing a load linked instruction and a store conditional instruction. The store conditional instruction updates data stored in a shared memory address only when at least three conditions are satisfied. The conditions are: a copy of a load linked shared memory address of the load linked instruction is the same as the store conditional shared memory address, a reservation flag indicates that the thread has a valid reservation, and the copy of data stored by the load linked instruction is the same as data stored in the store conditional shared memory address.
摘要翻译：多线程二进制翻译系统通过线程执行原子操作，这样的操作包括处理加载链接指令和存储条件指令。存储条件指令仅在满足至少三个条件时更新存储在共享存储器地址中的数据。条件是：负载链接指令的负载链接共享存储器地址的副本与存储条件共享存储器地址相同，保留标志指示线程具有有效预留，以及负载存储的数据副本链接指令与存储在存储条件共享存储器地址中的数据相同。

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