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1. 发明公开

US20230230627A1 SEMICONDUCTOR MEMORY DEVICE MANAGING FLEXIBLE REFRESH SKIP AREA 审中-公开
公开(公告)号：US20230230627A1
公开(公告)日：2023-07-20
申请号：US18125098
申请日：2023-03-22
申请人： Samsung Electronics Co., Ltd.
发明人： UKSONG KANG , HOIJU CHUNG
IPC分类号： G11C11/406
CPC分类号： G11C11/40618 , G11C11/40615 , G11C11/40626
摘要： A semiconductor memory device having a flexible refresh skip area includes a memory cell array including a plurality of rows to store data, a row decoder connected to the memory cell array, a refresh area storage unit to store a beginning address and an end address of a memory area that is to be refreshed in which the memory area that is to be refreshed does not include a refresh skip area having a size is selectively and/or adaptively changed, and a refresh control circuit connected to the row decoder and the refresh area storage unit. The refresh control circuit controls a refresh operation for the area that is to be refreshed and not for the refresh skip area.

2. 发明申请

US20170047110A1 SEMICONDUCTOR MEMORY DEVICE MANAGING FLEXIBLE REFRESH SKIP AREA 审中-公开
标题翻译：半导体存储设备管理灵活的刷新区域
公开(公告)号：US20170047110A1
公开(公告)日：2017-02-16
申请号：US15233942
申请日：2016-08-10
申请人： Samsung Electronics Co., Ltd.
发明人： UKSONG KANG , HOIJU CHUNG
IPC分类号： G11C11/406 , G11C11/408
CPC分类号： G11C11/40615 , G11C11/406 , G11C11/40622 , G11C11/40626 , G11C11/4087
摘要： A semiconductor memory device having a flexible refresh skip area includes a memory cell array including a plurality of rows to store data, a row decoder connected to the memory cell array, a refresh area storage unit to store a beginning address and an end address of a memory area that is to be refreshed in which the memory area that is to be refreshed does not include a refresh skip area having a size is selectively and/or adaptively changed, and a refresh control circuit connected to the row decoder and the refresh area storage unit. The refresh control circuit controls a refresh operation for the area that is to be refreshed and not for the refresh skip area.
摘要翻译：具有柔性刷新跳跃区域的半导体存储器件包括存储单元阵列，该存储单元阵列包括存储数据的多个行，连接到存储单元阵列的行解码器，存储起始地址和结束地址的刷新区域存储单元要刷新的存储器区域不包括具有尺寸的刷新跳过区域被选择性地和/或自适应地改变，并且刷新控制电路连接到行解码器和刷新区域存储器单元。刷新控制电路控制要刷新的区域的刷新操作，而不是刷新跳过区域。

3. 发明申请

US20140075135A1 SEMICONDUCTOR MEMORY DEVICE WITH OPERATION FUNCTIONS 有权
标题翻译：具有操作功能的半导体存储器件
公开(公告)号：US20140075135A1
公开(公告)日：2014-03-13
申请号：US13966585
申请日：2013-08-14
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： HYOJIN CHOI , CHULWOO PARK , UKSONG KANG , HAKSOO YU
IPC分类号： G06F12/00
CPC分类号： G06F12/00 , G11C7/1006 , G11C11/4076
摘要： A semiconductor memory device performs a modified read operation or a modified write operation. The semiconductor memory device includes a memory cell array, a read circuit, and a write circuit. The semiconductor memory device further includes an operation unit performing an operation on read data obtained by the read circuit according to operation assignment information applied through an address line to reduce memory access time when entering a modified read mode. In addition, the semiconductor memory device may optionally manage a normal read mode and the modified read mode and allow operation result data output from the operation unit to be written by the write circuit in the modified read mode.
摘要翻译：半导体存储器件执行修改的读取操作或修改的写入操作。半导体存储器件包括存储单元阵列，读取电路和写入电路。半导体存储器件还包括操作单元，根据通过地址线施加的操作分配信息，对由读取电路获得的读取数据执行操作，以减少进入修改的读取模式时的存储器访问时间。此外，半导体存储器件可以可选地管理正常读取模式和修改读取模式，并且允许由操作单元输出的操作结果数据由修改读取模式下的写入电路写入。

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