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1. 发明申请

US20110102093A1 INTEGRATED OSCILLATOR CIRCUIT HAVING AT LEAST TWO RESONANT CIRCUITS 审中-公开
标题翻译：具有两个谐振电路的集成振荡器电路
公开(公告)号：US20110102093A1
公开(公告)日：2011-05-05
申请号：US12296501
申请日：2007-03-31
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H03B5/12
CPC分类号： H03B5/1841 , H03B5/1203 , H03B5/1212 , H03B5/1218 , H03B5/1231 , H03B5/124 , H03B5/1296
摘要： An integrated oscillator circuit (16) with an amplifier circuit (22) and a frequency-selective feedback network comprising a first resonant circuit (18) and a second resonant circuit (20) is proposed. The oscillator circuit is characterized in that the first resonant circuit (18) is connected to the amplifier circuit (22) solely on the output side and is formed as a parallel resonant circuit comprising a first capacitor (24) and a first inductor (26), and the second resonant circuit (20) is connected to the amplifier circuit (22) solely on the input side (36, 38) and is formed as a parallel resonant circuit comprising a second capacitor (32) and a second inductor (34).
摘要翻译：提出了一种具有放大器电路（22）和包括第一谐振电路（18）和第二谐振电路（20）的频率选择反馈网络的集成振荡器电路（16）。振荡电路的特征在于，第一谐振电路（18）仅在输出侧连接到放大器电路（22），并形成为包括第一电容器（24）和第一电感器（26）的并联谐振电路，，并且第二谐振电路（20）仅在输入侧（36,38）上连接到放大器电路（22），并且形成为包括第二电容器（32）和第二电感器（34）的并联谐振电路，。

2. 发明申请

US20080245543A1 MONOLITHIC INTEGRATED CIRCUIT ARRANGEMENT 审中-公开
标题翻译：单片集成电路布置
公开(公告)号：US20080245543A1
公开(公告)日：2008-10-09
申请号：US12107057
申请日：2008-04-21
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H05K9/00
CPC分类号： H01L23/5227 , H01F27/40 , H01F2017/0046 , H01L23/5223 , H01L23/5225 , H01L27/0611 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A monolithic integrated circuit arrangement is provided that includes a first circuit component, which is formed as a differentially supplied coil and has at least one conductor loop encompassing an interior region, and at least one additional circuit component. According to an embodiment of the invention, the additional circuit component of the circuit arrangement is disposed in the interior region.
摘要翻译：提供了一种单片集成电路装置，其包括形成为差分供电的线圈并且具有至少一个包围内部区域的导体环的第一电路部件和至少一个附加电路部件。根据本发明的实施例，电路装置的附加电路部件设置在内部区域中。

3. 发明申请

US20080084255A1 Integrated circuit arrangement and use of connecting lines 审中-公开
标题翻译：集成电路布置和连接线的使用
公开(公告)号：US20080084255A1
公开(公告)日：2008-04-10
申请号：US11902479
申请日：2007-09-21
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H01F27/30 , H01F41/10 , H03H7/00
CPC分类号： H01F17/0006 , H01F27/40 , H01F2017/0073 , H01G4/40 , H01L23/5227 , H01L23/645 , H01L2924/0002 , Y10T29/4902 , H01L2924/00
摘要： An integrated circuit arrangement and a use of connecting lines is provided. The integrated circuit arrangement has an inductive unit and a circuit component, wherein the inductive unit has a first inductor with a first coil and first connecting lines, wherein the first connecting lines connect the first coil to the circuit component, wherein the inductive unit has at least one second inductor that is connected in parallel to the first inductor and that has a second coil and second connecting lines, wherein the second connecting lines connect the second coil to the circuit component, and wherein the circuit component is arranged between the first coil and the second coil.
摘要翻译：提供集成电路装置和连接线路的使用。集成电路装置具有感应单元和电路部件，其中感应单元具有带有第一线圈和第一连接线的第一电感器，其中第一连接线将第一线圈连接到电路部件，其中感应单元具有所述至少一个第二电感器并联连接到所述第一电感器，并且具有第二线圈和第二连接线，其中所述第二连接线将所述第二线圈连接到所述电路部件，并且其中所述电路部件布置在所述第一线圈和第二线圈。

4. 发明申请

US20070187804A1 Monolithic integrated circuit 审中-公开
标题翻译：单片集成电路
公开(公告)号：US20070187804A1
公开(公告)日：2007-08-16
申请号：US11584562
申请日：2006-10-23
申请人： Samir El Rai , Thorsten Sierra , Ralf Tempel
发明人： Samir El Rai , Thorsten Sierra , Ralf Tempel
IPC分类号： H01L23/58
CPC分类号： H03H7/325 , H01L2924/0002 , H03H7/1766 , H03H7/1775 , H03H7/24 , H03H7/38 , H03H2001/0078 , H01L2924/00
摘要： A monolithic integrated circuit is provided that includes at least one transmission line integrated into the circuit. The transmission line includes a series circuit of at least two elementary circuits, wherein each elementary circuit has at least one lumped inductive element (L) and/or at least one lumped capacitive element (C).
摘要翻译：提供了一种单片集成电路，其包括集成到电路中的至少一个传输线。传输线包括至少两个基本电路的串联电路，其中每个基本电路具有至少一个集总电感元件（L）和/或至少一个集总电容元件（C）。

5. 发明授权

US07633359B2 Monolithically integratable LC circuit arrangement 失效
标题翻译：单片可积分LC电路布置
公开(公告)号：US07633359B2
公开(公告)日：2009-12-15
申请号：US11882113
申请日：2007-07-30
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H03H7/00 , H03H7/01
CPC分类号： H01L27/08 , H01F27/34 , H01F27/402 , H01F2017/002 , H01F2017/0046 , H01L23/5223 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , H03B5/1841 , H01L2924/00
摘要： A monolithically integratable circuit arrangement is provided, which has at least one inductor, formed as a conductor loop, and at least one capacitor, connected to the conductor loop. According to the invention, the circuit arrangement comprises (a) at least one first conductor loop placed in at least one first metallization level and having a first DC terminal for applying a first DC potential, (b) at least one second conductor loop placed in at least one second metallization level and having a second DC terminal for applying a second DC potential, (c) at least one metal-isolator-metal capacitor with a capacitor plate, which is placed in a third metallization level between the first and second metallization level, and (d) at least one metallic connecting means placed between the capacitor plate and the first conductor loop, said means which connects the capacitor plate in an electrically conducting manner to the first conductor loop. The invention relates furthermore to an integrated circuit having a circuit arrangement of this type.
摘要翻译：提供了一种单片可积分电路装置，其具有形成为导体环路的至少一个电感器和连接到导体环路的至少一个电容器。根据本发明，电路装置包括（a）放置在至少一个第一金属化电平中的至少一个第一导体环路，并具有用于施加第一DC电位的第一DC端子，（b）至少一个第二导体环路，至少一个第二金属化水平并且具有用于施加第二DC电位的第二DC端子，（c）至少一个具有电容器板的金属隔离金属电容器，其被放置在第一和第二金属化之间的第三金属化水平以及（d）放置在电容器板和第一导体环之间的至少一个金属连接装置，所述装置将电容器板以导电方式连接到第一导体环路。本发明还涉及具有这种类型的电路装置的集成电路。

6. 发明授权

US07592879B2 Integrated circuit with at least one integrated transmission line 有权
标题翻译：具有至少一个集成传输线的集成电路
公开(公告)号：US07592879B2
公开(公告)日：2009-09-22
申请号：US11526814
申请日：2006-09-26
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H01P5/00
CPC分类号： H01P3/08 , H01L23/66 , H01L2223/6638 , H01L2924/0002 , H01L2924/3011 , H05K1/0228 , H01L2924/00
摘要： An integrated circuit is disclosed that includes at least one integrated transmission line for the transmission of a high-frequency differential signal with a number of at least two series-connected line arrangements, each of which has a differential input, a differential output, a first trace, connected to a first terminal of the differential input and a first terminal of the differential output, and a second trace, connected to a second terminal of the differential input and a second terminal of the differential output. According to the invention, each line arrangement has at least two crossing areas, in which the first and the second traces cross, and at least four positive feedback regions, in which at least one first section of the first trace is placed at a small first distance to at least one second section of the second trace in such a way that the magnetic fields, caused by the currents flowing in the first and section sections, are mutually amplified in the exterior space surrounding the first and second sections when the high-frequency differential signal is applied at the differential input of the line arrangement.
摘要翻译：公开了一种集成电路，其包括用于传输具有多个至少两个串联连接的线路布置的高频差分信号的至少一个集成传输线，每个具有差分输入，差分输出，第一跟踪，连接到差分输入的第一端和差分输出的第一端，以及连接到差分输入的第二端和差分输出的第二端的第二迹线。根据本发明，每个线路布置具有至少两个交叉区域，其中第一和第二迹线交叉，以及至少四个正反馈区域，其中第一迹线的至少一个第一部分以小的第一到第二迹线的至少一个第二部分的距离，使得当在第一和第二部分中流动的电流引起的磁场在第一和第二部分周围的外部空间中相互放大时，当高频在线路布置的差分输入处施加差分信号。

7. 发明申请

US20080048760A1 Monolithically integratable circuit arrangement 失效
标题翻译：单片可积分电路布置
公开(公告)号：US20080048760A1
公开(公告)日：2008-02-28
申请号：US11882113
申请日：2007-07-30
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H03H11/00
CPC分类号： H01L27/08 , H01F27/34 , H01F27/402 , H01F2017/002 , H01F2017/0046 , H01L23/5223 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , H03B5/1841 , H01L2924/00
摘要： A monolithically integratable circuit arrangement is provided, which has at least one inductor, formed as a conductor loop, and at least one capacitor, connected to the conductor loop. According to the invention, the circuit arrangement comprises (a) at least one first conductor loop placed in at least one first metallization level and having a first DC terminal for applying a first DC potential, (b) at least one second conductor loop placed in at least one second metallization level and having a second DC terminal for applying a second DC potential, (c) at least one metal-isolator-metal capacitor with a capacitor plate, which is placed in a third metallization level between the first and second metallization level, and (d) at least one metallic connecting means placed between the capacitor plate and the first conductor loop, said means which connects the capacitor plate in an electrically conducting manner to the first conductor loop. The invention relates furthermore to an integrated circuit having a circuit arrangement of this type.
摘要翻译：提供了一种单片可积分电路装置，其具有形成为导体环路的至少一个电感器和连接到导体环路的至少一个电容器。根据本发明，电路装置包括（a）放置在至少一个第一金属化电平中的至少一个第一导体环路，并具有用于施加第一DC电位的第一DC端子，（b）至少一个第二导体环路，至少一个第二金属化水平并且具有用于施加第二DC电位的第二DC端子，（c）至少一个具有电容器板的金属隔离金属电容器，其被放置在第一和第二金属化之间的第三金属化水平以及（d）放置在电容器板和第一导体环之间的至少一个金属连接装置，所述装置将电容器板以导电方式连接到第一导体环路。本发明还涉及具有这种类型的电路装置的集成电路。

8. 发明授权

US07795991B2 Integrated circuit arrangement to set a phase difference 有权
标题翻译：集成电路布置来设置相位差
公开(公告)号：US07795991B2
公开(公告)日：2010-09-14
申请号：US11836767
申请日：2007-08-09
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H01P9/00 , H04B1/38
CPC分类号： H03H7/185 , H03H7/20 , H03H7/345
摘要： An integrated circuit arrangement (1; 2; 3; 4) for setting a predefined phase difference (phi_target) between a first high-frequency signal (x1; x1p, x1n) and a second high-frequency signal (x2; x2p, x2n), comprising: e) a chain connection of a plurality (N) of basic circuits (10; 20; 30; 40), whereby each basic circuit has a first transmission line (11; 11p, 11n) for transmitting the first signal (x1; x1p, x1n), a second transmission line (12; 12p, 12n) for transmitting the second signal (x2; x2p, x2n), and a controllable phase-influencing means (13; 23; 33; 43), connected to the first transmission line, for controllably influencing the phase of the first signal, f) a phase difference detector (14; 34), which is connected to the output-side basic circuit and is formed to detect a current phase difference (phi_actual) between the first and second signal, g) a control unit (15; 35), which is connected to the phase difference detector and each controllable phase-influencing means (13; 23; 33; 43) and is formed to generate first digital control voltages, dependent on the current phase difference (phi_actual), as control signals (vt1, vt2, . . . ) for each phase-influencing means (13; 23; 33; 43), whereby the digital control voltage can assume only two different voltage values, and h) whereby each controllable phase-influencing means (13; 23; 33; 43;) has at least one first tunable capacitive unit (16; 16p, 16n; 46p, 46n), which is connected to the first transmission line and the control unit and is designed to delay the first signal depending on one of the first control signals.
摘要翻译：一种用于在第一高频信号（x1; x1p，x1n）和第二高频信号（x2; x2p，x2n）之间设置预定相位差（phi_target）的集成电路装置（1; 2; 3; 4）包括：e）多个（N个）基本电路（10; 20; 30; 40）的链式连接，由此每个基本电路具有用于传送第一信号（x1，...，11n）的第一传输线 ; x1p，x1n），用于发送第二信号（x2; x2p，x2n）的第二传输线（12; 12p，12n）以及可控相位影响装置（13; 23; 33; 43）第一传输线，用于可控地影响第一信号的相位，f）相位差检测器（14; 34），其连接到输出侧基本电路，并被形成为检测第一传输线之间的当前相位差（phi_actual）第一和第二信号，g）控制单元（15; 35），其连接到所述相位差检测器和每个可控相位影响装置（13; 23） ; 33; 形成为根据当前相位差（phi_actual）产生作为每个相位影响装置（13; 23; 33; 43）的控制信号（vt1，vt2，...）的第一数字控制电压，由此数字控制电压可以仅采取两个不同的电压值，并且h），其中每个可控相位影响装置（13; 23; 33; 43;）具有至少一个第一可调谐电容单元（16; 16p，16n; 46p， 46n），其连接到第一传输线和控制单元，并且被设计成根据第一控制信号之一来延迟第一信号。

9. 发明授权

US07760047B2 Coupling element for electromagnetic coupling of at least two conductors of a transmission line 有权
标题翻译：用于传输线路的至少两个导体的电磁耦合的耦合元件
公开(公告)号：US07760047B2
公开(公告)日：2010-07-20
申请号：US11599399
申请日：2006-11-15
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H01P5/12 , H01P3/08
CPC分类号： H01P5/04
摘要： A coupling element is disclosed for electromagnetic coupling of at least two conductors of a transmission line, wherein the coupling element is arranged between a first conductor and a second conductor of the transmission line and has at least one discrete component. The coupling element can have at least one first branch embodied as a transmission line segment that is associated with the first conductor, and a second branch embodied as a transmission line segment that is associated with the second conductor. The at least one discrete component can thereby be provided for connecting the first branch to the second branch.
摘要翻译：公开了一种耦合元件，用于传输线的至少两个导体的电磁耦合，其中耦合元件布置在传输线的第一导体和第二导体之间并且具有至少一个分立元件。耦合元件可以具有体现为与第一导体相关联的传输线段的至少一个第一分支和实施为与第二导体相关联的传输线段的第二分支。因此，可以提供至少一个分立部件用于将第一分支连接到第二分支。

10. 发明申请

US20080157900A1 INTEGRATED CIRCUIT ARRANGEMENT TO SET A PHASE DIFFERENCE 有权
标题翻译：集成电路设置设置相位差
公开(公告)号：US20080157900A1
公开(公告)日：2008-07-03
申请号：US11836767
申请日：2007-08-09
申请人： Samir El Rai , Ralf Tempel
发明人： Samir El Rai , Ralf Tempel
IPC分类号： H03H7/20
CPC分类号： H03H7/185 , H03H7/20 , H03H7/345
摘要： An integrated circuit arrangement (1; 2; 3; 4) for setting a predefined phase difference (phi_target) between a first high-frequency signal (x1; x1p, x1n) and a second high-frequency signal (x2; x2p, x2n), comprising: e) a chain connection of a plurality (N) of basic circuits (10; 20; 30; 40), whereby each basic circuit has a first transmission line (11; 11p, 11n) for transmitting the first signal (x1; x1p, x1n), a second transmission line (12; 12p, 12n) for transmitting the second signal (x2; x2p, x2n), and a controllable phase-influencing means (13; 23; 33; 43), connected to the first transmission line, for controllably influencing the phase of the first signal, f) a phase difference detector (14; 34), which is connected to the output-side basic circuit and is formed to detect a current phase difference (phi_actual) between the first and second signal, g) a control unit (15; 35), which is connected to the phase difference detector and each controllable phase-influencing means (13; 23; 33; 43) and is formed to generate first digital control voltages, dependent on the current phase difference (phi_actual), as control signals (vt1, vt2, . . . ) for each phase-influencing means (13; 23; 33; 43), whereby the digital control voltage can assume only two different voltage values, and h) whereby each controllable phase-influencing means (13; 23; 33; 43;) has at least one first tunable capacitive unit (16; 16p, 16n; 46p, 46n), which is connected to the first transmission line and the control unit and is designed to delay the first signal depending on one of the first control signals.
摘要翻译：一种用于在第一高频信号（x 1; x 1 p，x 1 n）和第二高频信号（x）之间设置预定相位差（phi_target）的集成电路装置（1; 2; 3; 4） 2; x 2 p，x 2 n），包括：e）多个（N）个基本电路（10; 20; 30; 40）的链式连接，由此每个基本电路具有第一传输线（11; 11 用于发送第一信号（x 1; x 1 p，x 1 n）的第二传输线（12; 12 p，12 n），用于发送第二信号（x 2; x 2 p，x 1 n） 2n）和连接到第一传输线的可控相位影响装置（13; 23; 33; 43），用于可控地影响第一信号的相位，f）相位差检测器（14; 34）其连接到输出侧基本电路，并且被形成为检测第一和第二信号之间的当前相位差（phi_actual），g）连接到相位差检测器的控制单元（15; 35）和每个续可滚动相位影响装置（13; 23; 33; 形成为根据当前相位差（phi_actual）产生作为每个相位影响装置（13; 23; 33; 43的控制信号（vt 1，vt 2，...））的第一数字控制电压），由此数字控制电压可以仅承担两个不同的电压值，并且h），其中每个可控相位影响装置（13; 23; 33; 43;）具有至少一个第一可调谐电容单元（16; 16 p，16 n; 46 p，46 n），其被连接到第一传输线和控制单元，并被设计成根据第一控制信号之一来延迟第一信号。

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