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1. 发明授权

US09311975B1 Bi-synchronous electronic device and FIFO memory circuit with jump candidates and related methods 有权
标题翻译：双同步电子设备和具有跳转候选和FIFO相关方法的FIFO存储器电路
公开(公告)号：US09311975B1
公开(公告)日：2016-04-12
申请号：US14508321
申请日：2014-10-07
申请人： STMICROELECTRONICS S.r.l.
发明人： Salvatore Marco Rosselli , Giuseppe Guarnaccia , Ugo Mari
IPC分类号： G11C7/22 , G06F5/06
CPC分类号： G11C7/222 , G06F5/06 , G06F5/10 , G06F2205/102
摘要： A bi-synchronous electronic device may include a FIFO memory circuit, and a first digital circuit coupled to the FIFO memory circuit and configured to operate based upon a first clock signal, and write to the FIFO memory circuit based upon a write pointer. The bi-synchronous electronic device may include second digital circuit coupled to the FIFO memory circuit and configured to operate based upon a second clock signal different from the first clock signal, and read from the FIFO memory circuit based upon a read pointer. The FIFO memory circuit may be configured to detect a jump in the write pointer to a new position, determine jump candidates for the read pointer from a current position, select a jump candidate, and synchronize the read pointer based upon the selected jump candidate.
摘要翻译：双同步电子设备可以包括FIFO存储器电路和耦合到FIFO存储器电路并被配置为基于第一时钟信号进行操作的第一数字电路，并且基于写指针写入FIFO存储器电路。双同步电子设备可以包括耦合到FIFO存储器电路并被配置为基于与第一时钟信号不同的第二时钟信号进行操作的第二数字电路，并且基于读指针从FIFO存储器电路读取。 FIFO存储器电路可以被配置为检测写指针中的跳转到新位置，从当前位置确定读指针的跳转候选，选择跳转候选，并且基于所选择的跳转候选来同步读指针。

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