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    • 1. 发明申请
    • TRANSISTORS AND FABRICATION METHOD THEREOF
    • 晶体管及其制造方法
    • US20140151637A1
    • 2014-06-05
    • US13831995
    • 2013-03-15
    • SEMICONDUCTOR MANUFACTURING INTERNATIONAL CORP.
    • DEYUAN XIAO
    • H01L29/66H01L29/778
    • H01L29/66462H01L21/8252H01L27/088H01L29/0847H01L29/2003H01L29/517H01L29/7783
    • A method is provided for fabricating a transistor. The method includes providing a semiconductor substrate, and forming a quantum well layer on the semiconductor substrate. The method also includes forming a potential energy barrier layer on the semiconductor substrate, and forming an isolation structure to isolate different transistor regions. Further, the method includes patterning the transistor region to form trenches by removing portions of the quantum well layer and the potential energy barrier layer corresponding to a source region and a drain region, and filling trenches with a semiconductor material to form a source and a drain. Further, the method also includes forming a gate structure on a portion of the quantum well layer and the potential energy barrier layer corresponding to a gate region.
    • 提供了一种用于制造晶体管的方法。 该方法包括提供半导体衬底,并在半导体衬底上形成量子阱层。 该方法还包括在半导体衬底上形成势能阻挡层,并形成隔离结构以隔离不同的晶体管区域。 此外,该方法包括通过去除与源极区和漏极区相对应的量子阱层和势能势垒层的部分来形成沟槽,以形成沟槽,并且用半导体材料填充沟槽以形成源极和漏极 。 此外,该方法还包括在量子阱层的一部分上形成栅极结构和对应于栅极区的势垒层。