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1. 发明授权

US10410727B2 Non-volatile memories and data reading methods thereof 有权
公开(公告)号：US10410727B2
公开(公告)日：2019-09-10
申请号：US15641781
申请日：2017-07-05
申请人： Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
发明人： Yi Jin Kwon , Hao Ni , Jim Chia-Ming Hsu , Xiao Yan Liu
IPC分类号： G11C16/28 , G11C16/08 , G11C16/24 , G11C16/30 , G11C7/06 , G11C16/26
摘要： A non-volatile memory (NVM) includes at least one memory unit region, each including a memory array and having first memory cells in the odd columns and second memory cells in the even columns. Corresponding to each memory unit region, the NVM includes a multiplexer including first bit line decoders and second bit line decoders, a comparator circuit including a first input terminal and a second input terminal, and a bias generation circuit generating a bias voltage. When reading a data information from a first memory cell, a first output voltage of the first memory cell is sent to the first input terminal and the bias voltage is sent to the second input terminal. When reading a data information from a second memory cell, a second output voltage of the second memory cell is sent to the second input terminal and the bias voltage is sent to the first input terminal.

2. 发明授权

US10382040B2 High voltage level shifting (HVLS) circuit and related semiconductor devices 有权
公开(公告)号：US10382040B2
公开(公告)日：2019-08-13
申请号：US16041640
申请日：2018-07-20
申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION , SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
发明人： Yi Jin Kwon , Hao Ni , Chang Wei Yin , Hong Yu
IPC分类号： H03K19/0185 , H03K17/687 , H03K3/356
摘要： A high voltage level shifting circuit and related semiconductor devices are presented. The circuit comprises: a level conversion circuit that converts an input signal with a first high voltage to an output signal with a second high voltage; a first switch having a first node connected to a first power source and a second node connected to a control node of a first transistor; a second switch having a first node connected to the control node of the first transistor and a second node connected to a first connection node; and a switch control circuit connected to the first switch and the second switch and controls them not to be close at the same time. By adding these two switches to the level conversion circuit, this inventive concept substantially lowers the static current generated during a high voltage level conversion process.

3. 发明申请

US20190036532A1 HIGH VOLTAGE LEVEL SHIFTING (HVLS) CIRCUIT AND RELATED SEMICONDUCTOR DEVICES 审中-公开
公开(公告)号：US20190036532A1
公开(公告)日：2019-01-31
申请号：US16041640
申请日：2018-07-20
申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION , SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
发明人： Yi Jin Kwon , Hao Ni , Chang Wei Yin , Hong Yu
IPC分类号： H03K19/0185 , H03K3/356 , H03K17/687
CPC分类号： H03K19/018521 , H03K3/356 , H03K3/356017 , H03K3/356069 , H03K3/356113 , H03K3/35613 , H03K3/356165 , H03K17/687 , H03K19/0185
摘要： A high voltage level shifting circuit and related semiconductor devices are presented. The circuit comprises: a level conversion circuit that converts an input signal with a first high voltage to an output signal with a second high voltage; a first switch having a first node connected to a first power source and a second node connected to a control node of a first transistor; a second switch having a first node connected to the control node of the first transistor and a second node connected to a first connection node; and a switch control circuit connected to the first switch and the second switch and controls them not to be close at the same time. By adding these two switches to the level conversion circuit, this inventive concept substantially lowers the static current generated during a high voltage level conversion process.

4. 发明授权

US09768778B2 High voltage level shifter in ultra low power supply memory application 有权
公开(公告)号：US09768778B2
公开(公告)日：2017-09-19
申请号：US15093716
申请日：2016-04-07
申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
发明人： Yi Jin Kwon , Hao Ni , Yu Cheng , Hong Yu
IPC分类号： H03K19/0185
CPC分类号： H03K19/018507 , H03K3/356113
摘要： A high voltage level shifter includes a first high-voltage P-channel metal oxide semiconductor (HVPMOS) transistor, a second HVPMOS transistor, a discharge transistor having a first native high-voltage N-channel metal oxide semiconductor (HVNMOS) transistor and a first low-voltage N-channel metal oxide semiconductor (LVNMOS) transistor connected in series, and an avalanche transistor having a second HVNMOS transistor and a second LVNMOS transistor connected in series.

5. 发明授权

US09570115B2 Memory device, related method, and related electronic device 有权
标题翻译：存储器件，相关方法及相关电子器件
公开(公告)号：US09570115B2
公开(公告)日：2017-02-14
申请号：US14943626
申请日：2015-11-17
申请人： Semiconductor Manufacturing International (Shanghai) Corporation
发明人： Yi Jin Kwon , Hao Ni , Hong Yu , Chuntian Yu
IPC分类号： G11C7/02 , G11C5/06 , G11C5/14 , G11C7/06 , G11C7/12
CPC分类号： G11C7/22 , G11C5/06 , G11C5/147 , G11C7/062 , G11C7/12 , G11C8/08 , G11C8/14
摘要： A memory device may include the following elements: a first memory cell; a first word line for transmitting a first control signal to control an electrical connection in the first memory cell; a first bit line connected to the first memory cell; a first transistor, wherein a first terminal of the first transistor is connected to the first bit line; a second memory cell; a second word line for transmitting a second control signal to control an electrical connection in the second memory cell; a second bit line connected to the second memory cell; a second transistor, wherein a first terminal of the second transistor is connected to the second bit line; and a sense amplifier having a first input terminal connected to a second terminal of the first transistor and having a second input terminal connected to a second terminal of the second transistor.
摘要翻译：存储器件可以包括以下元件：第一存储器单元; 用于发送第一控制信号以控制第一存储器单元中的电连接的第一字线; 连接到第一存储单元的第一位线; 第一晶体管，其中所述第一晶体管的第一端子连接到所述第一位线; 第二存储单元; 用于发送第二控制信号以控制第二存储器单元中的电连接的第二字线; 连接到第二存储单元的第二位线; 第二晶体管，其中所述第二晶体管的第一端子连接到所述第二位线; 以及读出放大器，其具有连接到第一晶体管的第二端子的第一输入端子，并具有连接到第二晶体管的第二端子的第二输入端子。

6. 发明授权

US09953689B2 Memory device, related method, and related electronic device 有权
公开(公告)号：US09953689B2
公开(公告)日：2018-04-24
申请号：US15393023
申请日：2016-12-28
申请人： Semiconductor Manufacturing International (Shanghai) Corporation
发明人： Yi Jin Kwon , Hao Ni , Hong Yu , Chuntian Yu
IPC分类号： G11C7/10 , G11C7/22 , G11C5/06 , G11C7/06
CPC分类号： G11C7/22 , G11C5/06 , G11C5/147 , G11C7/062 , G11C7/12 , G11C8/08 , G11C8/14
摘要： A memory device may include the following elements: a first memory cell; a first word line for transmitting a first control signal to control an electrical connection in the first memory cell; a first bit line connected to the first memory cell; a first transistor, wherein a first terminal of the first transistor is connected to the first bit line; a second memory cell; a second word line for transmitting a second control signal to control an electrical connection in the second memory cell; a second bit line connected to the second memory cell; a second transistor, wherein a first terminal of the second transistor is connected to the second bit line; and a sense amplifier having a first input terminal connected to a second terminal of the first transistor and having a second input terminal connected to a second terminal of the second transistor.

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