专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US11335813B2 Semiconductor device 有权
公开(公告)号：US11335813B2
公开(公告)日：2022-05-17
申请号：US17054926
申请日：2019-05-23
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Hidetomo Kobayashi , Takayuki Ikeda , Takashi Nakagawa , Takeya Hirose , Shuichi Katsui
IPC分类号： G11C16/04 , H01L29/786 , G11C11/4074 , G11C11/4096 , H01L27/108 , H01L29/66
摘要： A semiconductor device in which the accuracy of arithmetic operation is increased by correction of the threshold voltage of a transistor can be provided. The semiconductor device includes first and second current supply circuits, and the second current supply circuit has the same configuration as the first current supply circuit. The first current supply circuit includes first and second transistors, a first capacitor, and first to third nodes. A first terminal of the first transistor is electrically connected to the first node, and a back gate of the first transistor is electrically connected to a first terminal of the second transistor and a first terminal of the first capacitor. A gate of the first transistor is electrically connected to the second node, and a second terminal of the first capacitor is electrically connected to a second terminal of the first transistor. The first node of the first current supply circuit is electrically connected to a second node of each of the first and second current supply circuits. The threshold voltage of the first transistor is corrected by writing a correction voltage to the back gate of the first transistor.

2. 发明授权

US10672771B2 Semiconductor device and memory device including the semiconductor device 审中-公开
公开(公告)号：US10672771B2
公开(公告)日：2020-06-02
申请号：US16175174
申请日：2018-10-30
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Fumika Akasawa , Hiroki Inoue , Takashi Nakagawa , Yoshiyuki Kurokawa
IPC分类号： H01L27/108 , H01L21/8242
摘要： To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The semiconductor device includes a word line divider, a memory cell, a first wiring, and a second wiring. The word line divider is electrically connected to the first wiring and the second wiring. The memory cell includes a first transistor with a dual-gate structure. A first gate of the first transistor is electrically connected to the first wiring, and a second gate of the first transistor is electrically connected to the second wiring. The word line divider supplies a high-level potential or a low-level potential to the first wiring and supplies a predetermined potential to the second wiring, whereby a threshold voltage of the first transistor is changed. With such a configuration, a semiconductor device that can reduce power consumption and retain data for a long time is driven.

3. 发明授权

US10545526B2 Circuit, driving method thereof, and semiconductor device 有权
公开(公告)号：US10545526B2
公开(公告)日：2020-01-28
申请号：US15183892
申请日：2016-06-16
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Hiroki Inoue , Yoshiyuki Kurokawa , Takashi Nakagawa , Fumika Akasawa
IPC分类号： G05F3/26
摘要： A circuit includes a current mirror circuit (CM circuit) including first and second transistors, a third transistor whose drain is electrically connected to a drain of the second transistor, a switch controlling the current output from the circuit, and first and second memory circuits. A reference current of the CM circuit is input to a drain of the first transistor; a current that is a copy of the reference current is output from the drain of the second transistor. When a current is output from the circuit, the reference current is not input to the CM circuit. A drain current corresponding to a voltage stored in the first memory circuit flows through the second transistor; a drain current corresponding to a voltage stored in the second memory circuit flows through the third transistor. The difference between the two drain currents corresponds to the output current of the circuit.

4. 发明授权

US10536657B2 Imaging device and electronic device 有权
公开(公告)号：US10536657B2
公开(公告)日：2020-01-14
申请号：US16081322
申请日：2017-03-09
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Takashi Nakagawa , Munehiro Kozuma , Yoshiyuki Kurokawa , Takayuki Ikeda
IPC分类号： H04N5/369 , H04N5/232 , H04N5/32 , H04N5/374 , H04N5/376 , G08B13/196 , H01L27/146 , H04N5/3745 , H04N5/378
摘要： An imaging device with low power consumption is provided. It includes a pixel capable of outputting difference data between two different frames, a circuit determining the significance of the difference data, a circuit controlling power supply, an A/D converter, and the like; obtains image data and then obtains difference data; and shuts off power supply to the A/D converter and the like in the case where it is determined that there is no difference, and continues or restarts the power supply to the A/D converter and the like when it is determined that there is a difference. Determining the significance of the difference data can be performed row by row in a pixel array or at nearly the same time in all the pixels included in the pixel array.

5. 发明授权

US10263119B2 Programmable device with high reliability for a semiconductor device, display system, and electronic device 有权
公开(公告)号：US10263119B2
公开(公告)日：2019-04-16
申请号：US15697896
申请日：2017-09-07
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Takashi Nakagawa , Yoshiyuki Kurokawa , Munehiro Kozuma
IPC分类号： H01L29/786 , H01L27/12 , H01L29/16 , H01L29/24 , H03K19/177 , H03K19/00 , H01L27/28
摘要： A novel semiconductor device is provided. The semiconductor device includes a programmable logic device including a programmable logic element, a control circuit, and a detection circuit. The programmable logic device includes a plurality of contexts. The control circuit is configured to control selection of the contexts. The detection circuit is configured to output a signal corresponding to the amount of radiation. The control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation. The first mode is a mode in which the programmable logic device performs processing by a multi-context method, and the second mode is a mode in which the programmable logic device performs processing using a majority signal of signals output from the logic element multiplexed by the plurality of contexts.

6. 发明授权

US09761281B2 Semiconductor device 有权
公开(公告)号：US09761281B2
公开(公告)日：2017-09-12
申请号：US14602950
申请日：2015-01-22
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Takashi Nakagawa , Takayuki Ikeda , Yoshiyuki Kurokawa , Munehiro Kozuma , Takeshi Aoki
IPC分类号： G11C11/24 , G11C5/14 , G11C14/00
CPC分类号： G11C5/148 , G11C11/24 , G11C14/0054
摘要： To provide a semiconductor device having a novel configuration, in which a malfunction and power consumption are reduced. A data holding circuit which includes a flipflop including first and second latch circuits and a shadow register including a nonvolatile memory portion; and a control signal generation circuit which generates a first control signal supplied to the first latch circuit and a second control signal supplied to the second latch circuit are included. The shadow register is a circuit which controls data saving or data restoring between the first and second latch circuits on the basis of a saving control signal or a restore control signal. The control signal generation circuit is a circuit which generates the first and second control signals at L level in a period during which data is saved or restored, on the basis of a clock signal, the saving control signal, and the restore control signal.

7. 发明申请

US20140368235A1 PROGRAMMABLE LOGIC DEVICE 有权
标题翻译：可编程逻辑器件
公开(公告)号：US20140368235A1
公开(公告)日：2014-12-18
申请号：US14305434
申请日：2014-06-16
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Takeshi Aoki , Yoshiyuki Kurokawa , Munehiro Kozuma , Takashi Nakagawa
IPC分类号： H03K19/00 , H03K19/0185
CPC分类号： H03K19/0013 , H03K19/018585
摘要： Data of a register in a programmable logic element is retained. A volatile storage circuit and a nonvolatile storage circuit are provided in a register of a programmable logic element whose function can be changed in response to a plurality of context signals. The nonvolatile storage circuit includes nonvolatile storage portions for storing data in the register. The number of nonvolatile storage portions corresponds to the number of context signals. With such a structure, the function can be changed each time context signals are switched and data in the register that is changed when the function is changed can be backed up to the nonvolatile storage portion in each function. In addition, the function can be changed each time context signals are switched and the data in the register that is backed up when the function is changed can be recovered to the volatile storage circuit.
摘要翻译：可编程逻辑元件中寄存器的数据被保留。易失性存储电路和非易失性存储电路设置在可编程逻辑元件的寄存器中，该可编程逻辑元件的功能可以响应于多个上下文信号而改变。非易失性存储电路包括用于将数据存储在寄存器中的非易失性存储部分。非易失性存储部分的数量对应于上下文信号的数量。通过这样的结构，可以在每次上下文信号切换时改变功能，并且在功能改变时改变的寄存器中的数据可以备份到每个功能中的非易失性存储部分。此外，每当上下文信号被切换并且功能改变时备份的寄存器中的数据可以被恢复到易失性存储电路时，可以改变该功能。

8. 发明授权

US10128249B2 Semiconductor device and memory device including the semiconductor device 有权
公开(公告)号：US10128249B2
公开(公告)日：2018-11-13
申请号：US15390957
申请日：2016-12-27
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Fumika Akasawa , Hiroki Inoue , Takashi Nakagawa , Yoshiyuki Kurokawa
IPC分类号： H01L27/108 , H01L21/8242 , G11C8/08 , G11C11/405 , G11C11/4074 , G11C11/408 , G11C11/403
摘要： To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The semiconductor device includes a word line divider, a memory cell, a first wiring, and a second wiring. The word line divider is electrically connected to the first wiring and the second wiring. The memory cell includes a first transistor with a dual-gate structure. A first gate of the first transistor is electrically connected to the first wiring, and a second gate of the first transistor is electrically connected to the second wiring. The word line divider supplies a high-level potential or a low-level potential to the first wiring and supplies a predetermined potential to the second wiring, whereby a threshold voltage of the first transistor is changed. With such a configuration, a semiconductor device that can reduce power consumption and retain data for a long time is driven.

9. 发明授权

US09870827B2 Semiconductor device and electronic device 有权
公开(公告)号：US09870827B2
公开(公告)日：2018-01-16
申请号：US15359017
申请日：2016-11-22
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Takashi Nakagawa , Hiroki Inoue , Fumika Akasawa , Yoshiyuki Kurokawa
IPC分类号： G11C16/04 , G11C11/34 , G11C16/10 , H01L27/12 , H01L27/146
CPC分类号： G11C16/10 , G11C7/1006 , G11C7/16 , G11C8/12 , G11C11/405 , G11C11/4087 , G11C16/0466 , H01L27/1225 , H01L27/124 , H01L27/14616 , H01L27/14636 , H01L27/14643
摘要： A semiconductor device with an arithmetic processing function is provided. The semiconductor device includes a first circuit and a second circuit each having a function of performing one-dimensional discrete cosine transform. By directly inputting output data of the first circuit to the second circuit, two-dimensional discrete cosine transform can be performed immediately. A memory cell array included in the first circuit is divided into a plurality of memory blocks. In the case where a selection transistor is provided in the memory block, data processing can be performed in each memory block.

10. 发明授权

US09390641B2 Display device and electronic device 有权
标题翻译：显示设备和电子设备
公开(公告)号：US09390641B2
公开(公告)日：2016-07-12
申请号：US13686223
申请日：2012-11-27
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Takayuki Ikeda , Takashi Nakagawa
IPC分类号： G09G3/32 , G09G1/00 , H01L27/12
CPC分类号： G09G1/005 , G09G3/3233 , G09G2300/0861 , H01L27/1255
摘要： To suppress enlargement of pixel area even in the case of reducing current supplied to an electroluminescent element. A switch transistor, a first driving transistor, an electroluminescent element, and a second driving transistor provided between the first driving transistor and the electroluminescent element are included. A power supply potential is supplied to a gate of the second driving transistor. Drain current of the second driving transistor is controlled by the first driving transistor and the second driving transistor, so that a value of current supplied to the electroluminescent element is controlled.
摘要翻译：为了抑制像素面积的扩大，即使在减少提供给电致发光元件的电流的情况下。包括设置在第一驱动晶体管和电致发光元件之间的开关晶体管，第一驱动晶体管，电致发光元件和第二驱动晶体管。电源电位被提供给第二驱动晶体管的栅极。第二驱动晶体管的漏极电流由第一驱动晶体管和第二驱动晶体管控制，从而控制提供给电致发光元件的电流值。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式