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1. 发明申请

US20130083599A1 NONVOLATILE MEMORY AND ERASING METHOD THEREOF 有权
公开(公告)号：US20130083599A1
公开(公告)日：2013-04-04
申请号：US13597534
申请日：2012-08-29
申请人： SANG-WAN NAM , WON-TAECK JUNG , JUNGHOON PARK
发明人： SANG-WAN NAM , WON-TAECK JUNG , JUNGHOON PARK
IPC分类号： G11C16/16
CPC分类号： G11C16/14 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/16 , G11C16/3418 , G11C16/344 , G11C16/3445 , H01L27/115
摘要： An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.

2. 发明申请

US20150009760A1 THREE-DIMENSIONAL NONVOLATILE MEMORY AND RELATED READ METHOD DESIGNED TO REDUCE READ DISTURBANCE 有权
标题翻译：三维非易失性存储器和相关读取方法设计用于减少读取干扰
公开(公告)号：US20150009760A1
公开(公告)日：2015-01-08
申请号：US14153164
申请日：2014-01-13
申请人： SANG-WAN NAM , WON-TAECK JUNG
发明人： SANG-WAN NAM , WON-TAECK JUNG
IPC分类号： G11C16/26 , G11C16/04
CPC分类号： G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
摘要： A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
摘要翻译：非易失性存储器件执行包括第一和第二间隔的读取操作。在第一间隔期间，器件分别对串联选择线和连接到串选择晶体管和接地选择晶体管的选择线施加导通电压。在第二间隔期间，器件对未选择的串选择线和未选择的接地选择线施加关断电压，同时继续对所选择的串选择线和选择的接地选择线施加导通电压。在第一和第二间隔中，设备将第一读取电压施加到连接到要由读取操作读取的存储器单元的选定字线，并将第二读取电压施加到连接到不被读取的存储器单元读取的未选字线读操作。

3. 发明申请

US20130235667A1 NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME 有权
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US20130235667A1
公开(公告)日：2013-09-12
申请号：US13650545
申请日：2012-10-12
申请人： SANG-WAN NAM , JUNGHOON PARK
发明人： SANG-WAN NAM , JUNGHOON PARK
IPC分类号： G11C16/10
CPC分类号： G11C16/10 , G11C16/0483
摘要： A method is provided for programming a nonvolatile memory device, which includes multiple memory cells connected in series in a direction substantially perpendicular to a substrate. The method includes programming a first memory cell of the multiple memory cells, and programming a second memory cell of the multiple memory cells after the first memory cell is programmed, the second memory cell being closer to the substrate than the first memory cell. A diameter of a channel hole of the first memory cell is larger than a diameter of a channel hole of the second memory cell.
摘要翻译：提供一种用于对非易失性存储器件进行编程的方法，该非易失性存储器件包括在基本上垂直于衬底的方向上串联连接的多个存储单元。该方法包括编程多个存储器单元的第一存储单元，以及在编程第一存储单元之后对多个存储器单元的第二存储单元进行编程，第二存储单元比第一存储单元更靠近衬底。第一存储单元的通道孔的直径大于第二存储单元的通道孔的直径。

4. 发明申请

US20130088921A1 OPERATING METHOD OF NONVOLATILE MEMORY AND METHOD OF CONTROLLING NONVOLATILE MEMORY 有权
公开(公告)号：US20130088921A1
公开(公告)日：2013-04-11
申请号：US13587955
申请日：2012-08-17
申请人： SANG-WAN NAM , KANG-BIN LEE , JUNGHOON PARK
发明人： SANG-WAN NAM , KANG-BIN LEE , JUNGHOON PARK
IPC分类号： G11C16/04
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3459 , H01L27/1157 , H01L27/11582
摘要： An operating method of a nonvolatile memory, which includes a plurality of cell strings, each cell string having a plurality of memory cells and a string selection transistor stacked on a substrate, includes detecting threshold voltages of the string selection transistors of the plurality of cell strings; adjusting voltages to be supplied to the string selection transistors according to the detected threshold voltages; and applying the adjusted voltages to the string selection transistors to select or unselect the plurality of cell strings during a programming operation.

5. 发明申请

US20170069390A1 MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF OPERATING MEMORY DEVICE 审中-公开
标题翻译：存储器件，存储器系统和操作存储器件的方法
公开(公告)号：US20170069390A1
公开(公告)日：2017-03-09
申请号：US15357291
申请日：2016-11-21
申请人： SANG-WAN NAM , DOO-HYUN KIM , DAE-SEOK BYEON , CHl-WEON YOON
发明人： SANG-WAN NAM , DOO-HYUN KIM , DAE-SEOK BYEON , CHl-WEON YOON
IPC分类号： G11C16/14 , H01L27/115 , G11C16/34 , G11C16/04 , G11C16/26
CPC分类号： G06F3/0619 , G06F3/061 , G06F3/0644 , G06F3/0655 , G06F3/0688 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/34 , G11C16/3459 , H01L27/11582
摘要： A memory device is provided as follows. A memory cell region includes a plurality of blocks, each block including a plurality of NAND strings. A control logic divides the plurality of blocks into a plurality of block regions based on a smaller distance of a first distance with respect to a first edge of the memory cell region and a second distance with respect to a second edge of the memory cell region and controls an operation performed on the memory cell region using a plurality of bias sets of operation parameters for the operation. Each bias set is associated with one of the block regions.
摘要翻译：如下提供存储器件。存储单元区域包括多个块，每个块包括多个NAND串。控制逻辑基于相对于存储器单元区域的第一边缘的第一距离的较小距离和相对于存储器单元区域的第二边缘的第二距离，将多个块划分为多个块区域，以及使用用于该操作的多个偏置操作参数组来控制在存储单元区域上执行的操作。每个偏差集合与块区域之一相关联。

6. 发明申请

US20160071592A1 3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME 审中-公开
公开(公告)号：US20160071592A1
公开(公告)日：2016-03-10
申请号：US14945354
申请日：2015-11-18
申请人： SANG-WAN NAM , KITAE PARK
发明人： SANG-WAN NAM , KITAE PARK
IPC分类号： G11C16/04 , G11C16/08 , G11C16/10
CPC分类号： G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/3427
摘要： A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.

7. 发明申请

US20160064083A1 NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME 有权
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US20160064083A1
公开(公告)日：2016-03-03
申请号：US14733239
申请日：2015-06-08
申请人： SANG-WAN NAM , WANDONG KIM
发明人： SANG-WAN NAM , WANDONG KIM
IPC分类号： G11C16/10 , G11C16/24 , G11C16/08
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/24
摘要： A nonvolatile memory device of the inventive concept includes a memory cell array, an address decoder, a read & write circuit and control logic. The memory cell array includes a plurality of memory blocks including a plurality of cell strings, each cell string including a plurality of memory cells stacked in a direction perpendicular to a substrate. The control logic controls operations so that in a program operation, when the selected word line satisfies a precharge condition, a program voltage to be applied to the selected word line is applied before a pass voltage to be applied to an unselected word line.
摘要翻译：本发明构思的非易失性存储器件包括存储单元阵列，地址解码器，读写电路和控制逻辑。存储单元阵列包括包括多个单元串的多个存储块，每个单元串包括沿垂直于基板的方向堆叠的多个存储单元。控制逻辑控制操作，使得在程序操作中，当所选择的字线满足预充电条件时，在施加到未选字线的通过电压之前施加要施加到所选字线的编程电压。

8. 发明申请

US20140226403A1 MEMORY SYSTEM AND METHOD OF DRIVING MEMORY SYSTEM USING ZONE VOLTAGES 有权
标题翻译：使用区域电压驱动存储器系统的存储器系统和方法
公开(公告)号：US20140226403A1
公开(公告)日：2014-08-14
申请号：US14056268
申请日：2013-10-17
申请人： SANG-WAN NAM , MINSU KIM , KANG-BIN LEE , KITAE PARK
发明人： SANG-WAN NAM , MINSU KIM , KANG-BIN LEE , KITAE PARK
IPC分类号： G11C16/08
CPC分类号： G11C16/24 , G11C5/147 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/3418 , G11C16/3459
摘要： A method is provided for driving a nonvolatile memory device, including multiple strings, where each string is formed by penetrating plate-shaped word lines stacked on a substrate. The method includes configuring the word lines of a string in multiple zones based on zone configuration information, and applying zone voltages to the zones, respectively. The zone configuration information is varied according to a mode of operation.
摘要翻译：提供一种用于驱动包括多个串的非易失性存储器件的方法，其中通过穿过堆叠在衬底上的板状字线形成每个串。该方法包括基于区域配置信息配置多个区域中的字符串的字线，并且将区域电压分别应用于区域。区域配置信息根据操作模式而变化。

9. 发明申请

US20160365149A1 NONVOLATILE MEMORY DEVICE AND WORDLINE DRIVING METHOD THEREOF 审中-公开
标题翻译：非易失性存储器件及其驱动方法
公开(公告)号：US20160365149A1
公开(公告)日：2016-12-15
申请号：US15172929
申请日：2016-06-03
申请人： SANG-WAN NAM , Sun-Min Yun , Bongsoon Lim , Yoon-Hee Choi
发明人： SANG-WAN NAM , Sun-Min Yun , Bongsoon Lim , Yoon-Hee Choi
IPC分类号： G11C16/08 , G11C16/34 , G11C16/28 , G11C16/04 , G11C16/10
CPC分类号： G11C16/08 , G11C8/08 , G11C16/0483 , G11C16/10 , G11C16/28 , G11C16/3459
摘要： According to example embodiments of inventive concepts, a nonvolatile memory device includes a memory cell array, an address decoder, an input/output circuit, a voltage generation circuit, and control logic. The memory cell array includes a plurality of memory blocks on a substrate. Each of the memory blocks includes a plurality of strings connected between bit lines and a common source line. The address decoder is configured to measure impedance information of word lines of a selected memory block. The voltage generation circuit is configured to generate word line voltages to be applied to word lines, and at least one of the word line voltages includes an offset voltage and a target voltage. The control logic is configured to adjust a level of the offset voltage and the offset time depending on the measured impedance information of the word lines.
摘要翻译：根据发明构思的示例实施例，非易失性存储器件包括存储单元阵列，地址解码器，输入/输出电路，电压产生电路和控制逻辑。存储单元阵列包括在衬底上的多个存储块。每个存储块包括连接在位线和公共源极线之间的多个串。地址解码器被配置为测量所选择的存储器块的字线的阻抗信息。电压产生电路被配置为产生要施加到字线的字线电压，并且字线电压中的至少一个包括偏移电压和目标电压。控制逻辑被配置为根据测得的字线的阻抗信息来调整偏移电压和偏移时间的电平。

10. 发明申请

US20150179235A1 ERASE METHOD OF NONVOLATILE MEMORY DEVICE AND STORAGE DEVICE EMPLOYING THE SAME 有权
标题翻译：非易失性存储器件的擦除方法及其使用的存储器件
公开(公告)号：US20150179235A1
公开(公告)日：2015-06-25
申请号：US14501361
申请日：2014-09-30
申请人： SANG-WAN NAM
发明人： SANG-WAN NAM
IPC分类号： G11C7/00 , G11C11/16 , G11C13/00 , G11C16/16
CPC分类号： G11C16/16 , G11C11/16 , G11C16/0483 , G11C16/3445
摘要： A method of erasing a nonvolatile memory device which includes a plurality of memory blocks includes receiving an erase command; erasing a selected memory block among the plurality of memory blocks in response to the erase command; and performing an operation of checking whether a threshold voltage of a selection transistor connected to at least one selection line for selecting strings included in the selected memory block is changed while performing an erase verification operation for checking whether the selected memory block is normally erased.
摘要翻译：擦除包括多个存储块的非易失性存储器件的方法包括接收擦除命令; 响应于所述擦除命令，擦除所述多个存储块中的所选存储块; 并且执行检查连接到选择晶体管的选择晶体管的阈值电压的操作，以便在执行用于检查所选择的存储块是否被正常擦除的擦除验证操作期间改变与包括在所选择的存储块中的选择串的选择线的选择晶体管的阈值电压。

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