专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20150263172A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20150263172A1
公开(公告)日：2015-09-17
申请号：US14206373
申请日：2014-03-12
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Yong-Min CHO , Hyun-Jae Kang , Dong-Il Bae
IPC分类号： H01L29/78 , H01L29/08 , H01L29/10
CPC分类号： H01L29/0847 , H01L29/165 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device is provided. A substrate includes a fin. The fin extends in a first direction. A gate structure is disposed on a first region of the fin. The gate structure extends in a second direction crossing the first direction. A source/drain is disposed on a second region of the fin. The first source/drain is disposed on at least one sidewall of the gate structure. A top surface of the first region is lower than a top surface of the second region.
摘要翻译：提供半导体器件。衬底包括翅片。翅片沿第一方向延伸。栅极结构设置在鳍的第一区域上。栅极结构沿与第一方向交叉的第二方向延伸。源极/漏极设置在鳍片的第二区域上。第一源极/漏极设置在栅极结构的至少一个侧壁上。第一区域的顶表面低于第二区域的顶表面。

2. 发明授权

US09991259B2 Semiconductor device 有权
公开(公告)号：US09991259B2
公开(公告)日：2018-06-05
申请号：US15387022
申请日：2016-12-21
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Hyun-Jae Kang , Jin-Wook Lee , Kang-Ill Seo , Yong-Min Cho
IPC分类号： H01L27/088 , H01L21/8234 , H01L21/3213 , H01L21/027 , H01L21/768 , H01L23/522 , H01L27/02 , H01L23/528 , H01L23/532 , G03F7/20
CPC分类号： H01L27/0886 , G03F7/70 , H01L21/0274 , H01L21/32136 , H01L21/32139 , H01L21/76816 , H01L21/76877 , H01L21/76895 , H01L21/823431 , H01L21/823437 , H01L21/823475 , H01L23/5226 , H01L23/528 , H01L23/53271 , H01L27/0207
摘要： Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.

3. 发明授权

US09418896B2 Semiconductor device and fabricating method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US09418896B2
公开(公告)日：2016-08-16
申请号：US14539579
申请日：2014-11-12
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Hyun-Jae Kang , Jin-Wook Lee , Kang-Ill Seo , Yong-Min Cho
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/3213
CPC分类号： H01L27/0886 , G03F7/70 , H01L21/0274 , H01L21/32136 , H01L21/32139 , H01L21/76816 , H01L21/76877 , H01L21/76895 , H01L21/823431 , H01L21/823437 , H01L21/823475 , H01L23/5226 , H01L23/528 , H01L23/53271 , H01L27/0207
摘要： Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.
摘要翻译：提供一种半导体器件及其制造方法。制造方法包括：形成第一至第四鳍片，每个翼片沿第一方向延伸，沿与第一方向相交的第二方向间隔开，形成第一和第二栅极线，每个沿第二方向延伸，第一至第四鳍片在所述第一方向上间隔开，在所述第一和第二鳍之间的所述第一栅极线上形成第一接触，在所述第三和第四鳍之间的所述第一栅极线上形成第二接触，在所述第二栅极线上形成第三接触在第一和第二散热片之间，在第三和第四鳍之间的第二栅极线上形成第四触点，并在第一至第四触点上形成第五触点，以便与第二触点和第三触点重叠，与第一触点和第四触点重叠，其中第五触点布置成对角地横过由第一至第四触点限定的四边形。

4. 发明授权

US09773869B2 Semiconductor device and method of fabricating the same 有权
公开(公告)号：US09773869B2
公开(公告)日：2017-09-26
申请号：US14206373
申请日：2014-03-12
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Yong-Min Cho , Hyun-Jae Kang , Dong-Il Bae
IPC分类号： H01L29/78 , H01L29/08 , H01L29/66 , H01L29/165
CPC分类号： H01L29/0847 , H01L29/165 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device is provided. A substrate includes a fin. The fin extends in a first direction. A gate structure is disposed on a first region of the fin. The gate structure extends in a second direction crossing the first direction. A source/drain is disposed on a second region of the fin. The first source/drain is disposed on at least one sidewall of the gate structure. A top surface of the first region is lower than a top surface of the second region.

5. 发明授权

US09570434B2 Semiconductor device and fabricating method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US09570434B2
公开(公告)日：2017-02-14
申请号：US15217531
申请日：2016-07-22
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Hyun-Jae Kang , Jin-Wook Lee , Kang-Ill Seo , Yong-Min Cho
IPC分类号： H01L27/088 , H01L27/02 , H01L23/522 , H01L21/768 , H01L21/8234
CPC分类号： H01L27/0886 , G03F7/70 , H01L21/0274 , H01L21/32136 , H01L21/32139 , H01L21/76816 , H01L21/76877 , H01L21/76895 , H01L21/823431 , H01L21/823437 , H01L21/823475 , H01L23/5226 , H01L23/528 , H01L23/53271 , H01L27/0207
摘要： Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.
摘要翻译：提供一种半导体器件及其制造方法。制造方法包括：形成第一至第四鳍片，每个翼片沿第一方向延伸，沿与第一方向相交的第二方向间隔开，形成第一和第二栅极线，每个沿第二方向延伸，第一至第四鳍片在第一方向上间隔开，在第一和第二鳍之间的第一栅极线上形成第一接触，在第三和第四鳍之间的第一栅极线上形成第二接触，在第二栅极线上形成第三接触在第一和第二散热片之间，在第三和第四鳍之间的第二栅极线上形成第四触点，并在第一至第四触点上形成第五触点，以便与第二触点和第三触点重叠，与第一触点和第四触点重叠，其中第五触点布置成对角地横过由第一至第四触点限定的四边形。

6. 发明申请

US20160380084A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20160380084A1
公开(公告)日：2016-12-29
申请号：US15234484
申请日：2016-08-11
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： JONG-HYUK KIM , Kang-Ill Seo , Hyun-Jae Kang , Deok-Han Bae
IPC分类号： H01L29/66 , H01L21/311 , H01L21/308
CPC分类号： H01L29/66795 , H01L21/0337 , H01L21/3086 , H01L21/31144 , H01L21/32139
摘要： A method of fabricating a semiconductor device is provided. A plurality of target patterns is formed on a substrate. The plurality of target patterns is extended in parallel to each other along a first direction. A first mask pattern extending in the first direction and including a plurality of first openings is formed. A second mask pattern extending in a second direction crossing the first direction and including a plurality of second openings is formed. Each second opening overlaps each first opening to form an overlapped opening region. A region of the plurality of target patterns is etched through the overlapped opening region using the first mask pattern and the second mask pattern as a etch mask. The region of the plurality of target patterns is overlapped with the overlapped opening region.

7. 发明授权

US10038077B2 Method for fabricating semiconductor device 有权
公开(公告)号：US10038077B2
公开(公告)日：2018-07-31
申请号：US15234484
申请日：2016-08-11
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jong-Hyuk Kim , Kang-Ill Seo , Hyun-Jae Kang , Deok-Han Bae
IPC分类号： H01L21/00 , H01L29/66 , H01L21/3213 , H01L21/033 , H01L21/311 , H01L21/308
CPC分类号： H01L29/66795 , H01L21/0337 , H01L21/3086 , H01L21/31144 , H01L21/32139 , H01L21/823821 , H01L27/0924
摘要： A method of fabricating a semiconductor device is provided. A plurality of target patterns is formed on a substrate. The plurality of target patterns is extended in parallel to each other along a first direction. A first mask pattern extending in the first direction and including a plurality of first openings is formed. A second mask pattern extending in a second direction crossing the first direction and including a plurality of second openings is formed. Each second opening overlaps each first opening to form an overlapped opening region. A region of the plurality of target patterns is etched through the overlapped opening region using the first mask pattern and the second mask pattern as a etch mask. The region of the plurality of target patterns is overlapped with the overlapped opening region.

8. 发明授权

US09472653B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09472653B2
公开(公告)日：2016-10-18
申请号：US14554107
申请日：2014-11-26
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jong-Hyuk Kim , Kang-Ill Seo , Hyun-Jae Kang , Deok-Han Bae
IPC分类号： H01L21/00 , H01L29/66 , H01L21/3213 , H01L21/033 , H01L21/311
CPC分类号： H01L29/66795 , H01L21/0337 , H01L21/3086 , H01L21/31144 , H01L21/32139
摘要： A method of fabricating a semiconductor device is provided. A plurality of target patterns is formed on a substrate. The plurality of target patterns is extended in parallel to each other along a first direction. A first mask pattern extending in the first direction and including a plurality of first openings is formed. A second mask pattern extending in a second direction crossing the first direction and including a plurality of second openings is formed. Each second opening overlaps each first opening to form an overlapped opening region. A region of the plurality of target patterns is etched through the overlapped opening region using the first mask pattern and the second mask pattern as a etch mask. The region of the plurality of target patterns is overlapped with the overlapped opening region.
摘要翻译：提供一种制造半导体器件的方法。在基板上形成多个目标图案。多个目标图案沿着第一方向彼此平行地延伸。形成在第一方向上延伸并且包括多个第一开口的第一掩模图案。形成沿与第一方向交叉的第二方向延伸并且包括多个第二开口的第二掩模图案。每个第二开口与每个第一开口重叠以形成重叠的开口区域。使用第一掩模图案和第二掩模图案作为蚀刻掩模，通过重叠的开口区域蚀刻多个目标图案的区域。多个目标图案的区域与重叠的开口区域重叠。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式