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1. 发明授权

US09502427B2 Non-volatile memory device and method of manufacturing the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US09502427B2
公开(公告)日：2016-11-22
申请号：US15047840
申请日：2016-02-19
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jae-Jin Shin , Kyung-Hyun Kim , Jung-Hun No , Choong-Kee Seong , Seung-Pil Chung , Jung-Geun Jee
IPC分类号： H01L21/8234 , H01L27/115
CPC分类号： H01L27/11521 , H01L21/28273 , H01L21/762 , H01L21/76289 , H01L21/764 , H01L21/823462 , H01L21/823481 , H01L29/66825
摘要： A preliminary tunnel insulation pattern and a preliminary charge storage pattern are formed on each active pattern extending in a direction, and a trench is defined between structures including the active pattern, the preliminary tunnel insulation pattern and the preliminary charge storage pattern. A preliminary isolation pattern partially fills the trench. A dielectric layer and a control gate electrode layer are formed on the preliminary charge storage pattern and the preliminary isolation pattern. The control gate electrode layer, the dielectric layer, the preliminary charge storage pattern and the preliminary tunnel insulation pattern are patterned to form gate structures including a tunnel insulation pattern, a charge storage pattern, a dielectric layer pattern and a control gate electrode. The preliminary isolation pattern is isotropically etched to form an isolation pattern and a first air gap. An insulating interlayer is formed between the gate structures to keep the first air gap.
摘要翻译：在沿着一个方向延伸的每个有源图案上形成初始隧道绝缘图案和初步电荷存储图案，并且在包括有源图案，预备隧道绝缘图案和预备电荷存储图案的结构之间限定沟槽。初步隔离图案部分地填充沟槽。在初步电荷存储图案和初步隔离图案上形成电介质层和控制栅极电极层。对控制栅极电极层，电介质层，预备电荷存储图案和预备隧道绝缘图案进行图案化以形成包括隧道绝缘图案，电荷存储图案，电介质层图案和控制栅电极的栅极结构。预先隔离图案被各向同性地蚀刻以形成隔离图案和第一气隙。在栅极结构之间形成绝缘中间层以保持第一气隙。

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