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1. 发明申请

US20130033327A1 HIGH FREQUENCY CIRCUIT AND HIGH FREQUENCY MODULE 有权
标题翻译：高频电路和高频模块
公开(公告)号：US20130033327A1
公开(公告)日：2013-02-07
申请号：US13547431
申请日：2012-07-12
申请人： Ryo KADOI , Norio HAYASHI , Satoshi SHIMIZU , Akio YAMAMOTO
发明人： Ryo KADOI , Norio HAYASHI , Satoshi SHIMIZU , Akio YAMAMOTO
IPC分类号： H03G3/30
CPC分类号： H03F1/0261 , H03F1/0211 , H03F3/193 , H03F3/195 , H03F2200/18 , H03F2200/465 , H03G3/3042
摘要： A high frequency circuit and a high frequency module are provided, in which the accuracy of compensation operation is improved in compensating by digital control. The amplification gain of an amplification element of an amplifier unit is controlled by a bias current of a bias control unit. A process monitoring circuit of a calibration circuit includes a first and a second element characteristic detector and a voltage comparator. The detectors convert the current of replica elements into a first and a second detection voltage. The voltage comparator compares a first and a second detection voltage and supplies a comparison output signal to a search control unit. Responding to the comparison output signal of the comparator and a clock signal of a clock generating unit, the controller generates a multi-bit digital compensation value according to a predetermined search algorithm, and the bias control unit of the second detector is feedback-controlled.
摘要翻译：提供了一种高频电路和高频模块，其中通过数字控制来补偿补偿操作的精度。放大器单元的放大元件的放大增益由偏置控制单元的偏置电流控制。校准电路的过程监控电路包括第一和第二元件特征检测器和电压比较器。检测器将复制元件的电流转换成第一和第二检测电压。电压比较器比较第一和第二检测电压，并将比较输出信号提供给搜索控制单元。响应于比较器的比较输出信号和时钟产生单元的时钟信号，控制器根据预定的搜索算法生成多位数字补偿值，并且反馈控制第二检测器的偏置控制单元。

2. 发明申请

US20090017594A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20090017594A1
公开(公告)日：2009-01-15
申请号：US12181065
申请日：2008-07-28
申请人： Jun SUMINO , Satoshi SHIMIZU
发明人： Jun SUMINO , Satoshi SHIMIZU
IPC分类号： H01L21/762
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11536
摘要： There is provided a non-volatile semiconductor memory device exhibiting excellent electrical characteristics and a method of fabricating the same. The semiconductor device includes a semiconductor substrate having two trenches, an isolation oxide film provided in the trench, a floating gate electrode, an ONO film, and a control gate electrode. The isolation oxide film has an upper surface with a region having a curvature protruding downward. The floating gate electrode has a flat upper surface and extends from a main surface of the semiconductor substrate between the two trenches to the two isolation oxide films. The ONO film extends from the upper surface of the floating gate electrode to a side surface of the floating gate electrode. The control gate electrode is provided on the ONO film to extend from the upper surface of the floating gate electrode to the side surface of the floating gate electrode.
摘要翻译：提供了表现出优异的电气特性的非易失性半导体存储器件及其制造方法。半导体器件包括具有两个沟槽的半导体衬底，设置在沟槽中的隔离氧化膜，浮置栅电极，ONO膜和控制栅电极。隔离氧化膜具有上表面，具有向下突出的曲率的区域。浮栅电极具有平坦的上表面，并且从两个沟槽之间的半导体衬底的主表面延伸到两个隔离氧化膜。 ONO膜从浮栅电极的上表面延伸到浮栅电极的侧表面。控制栅电极设置在ONO膜上，从浮栅电极的上表面延伸到浮栅电极的侧表面。

3. 发明申请

US20110016309A1 CRYPTOGRAPHIC COMMUNICATION SYSTEM AND GATEWAY DEVICE 审中-公开
标题翻译： CRYPTOGRAPHIC通信系统和网关设备
公开(公告)号：US20110016309A1
公开(公告)日：2011-01-20
申请号：US12776001
申请日：2010-05-07
申请人： Shinya MOTOYAMA , Satoshi SHIMIZU , Tadashi NOBE , Junnosuke WAKAI
发明人： Shinya MOTOYAMA , Satoshi SHIMIZU , Tadashi NOBE , Junnosuke WAKAI
IPC分类号： H04L9/00
CPC分类号： H04L63/0272 , H04L12/4633 , H04L12/4641 , H04L29/12367 , H04L61/2514 , H04L63/061 , H04L63/164 , H04W12/001 , H04W12/04
摘要： A GW (PDG) at the termination of remote access is installed in the 3GPP system. After an IPSec tunnel between a terminal and the GW is opened, an IPSec tunnel between a VPN client and the corporate network GW is opened, whereby the data from the terminal is transferred via two tunnels between the terminal and the GW and between the VPN client and the corporate network GW to the corporate network. Also, the GW checks if the destination network uses the global address from the destination IP address of a message received from the terminal making the remote VPN access. If the global address is required, the source IP address of the message received from the terminal is translated from the private address for use within the corporate network to which the terminal is allocated to the global address to transfer the message.
摘要翻译：在3GPP系统中安装终端远程接入的GW（PDG）。打开终端和GW之间的IPSec隧道，打开VPN客户端与企业网络GW之间的IPSec隧道，通过终端和GW之间的VPN客户端之间的两条隧道传输来自终端的数据，和企业网络GW到企业网络。此外，GW检查目的地网络是否从从进行远程VPN访问的终端接收到的消息的目的地IP地址中使用全局地址。如果需要全局地址，则从终端接收到的消息的源IP地址从私有地址转换为在终端被分配给该全局地址的公司网络内使用以传送该消息。

4. 发明申请

US20150336457A1 TORQUE INDICATING DEVICE AND VEHICLE INCLUDING SAME 有权
标题翻译：扭矩指示装置和包括其中的车辆
公开(公告)号：US20150336457A1
公开(公告)日：2015-11-26
申请号：US14440434
申请日：2012-11-20
申请人： Yoshihiro IKUSHIMA , Satoshi SHIMIZU
发明人： Yoshihiro IKUSHIMA , Satoshi SHIMIZU
IPC分类号： B60K35/00
CPC分类号： B60K35/00 , B60K17/34 , B60K17/3462 , B60K17/348 , B60K17/351 , B60K17/354 , B60K23/0808 , B60K2350/352 , B60W10/119 , B60W30/025 , B60W50/14 , B60W2520/30 , B60W2710/105 , B60W2720/30 , F16H2200/0017 , Y02T10/56
摘要： Disclosed is a torque indicating device including: a first indicating section that indicates a torque transmitted to primary drive wheels of a vehicle; and a second indicating section that indicates a torque transmitted to secondary drive wheels of the vehicle. The second indicating section indicates a quantity that is less than or equal to the quantity indicated by the first indicating section.
摘要翻译：公开了一种扭矩指示装置，包括：第一指示部，其指示传递到车辆的一次驱动轮的扭矩; 以及第二指示部，其指示传递到车辆的二次驱动轮的扭矩。第二指示部分指示小于或等于由第一指示部分指示的数量的数量。

5. 发明申请

US20110241131A1 SEMICONDUCTOR MEMORY DEVICE WITH BIT LINE OF SMALL RESISTANCE AND MANUFACTURING METHOD THEREOF 失效
标题翻译：具有小电阻线的半导体存储器件及其制造方法
公开(公告)号：US20110241131A1
公开(公告)日：2011-10-06
申请号：US13161207
申请日：2011-06-15
申请人： Satoshi SHIMIZU
发明人： Satoshi SHIMIZU
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/11568 , H01L27/115
摘要： A reduction of a resistance of a bit line of a memory cell array and a reduction of a forming area of the memory cell array are planed. Respective bit lines running at right angles to a word line are composed of a diffusion bit line formed in a semiconductor substrate and a linear metal bit line on an upper side of the diffusion bit line. The diffusion bit line is formed in a linear pattern on a lower side of the metal bit line in the same manner, and the metal bit line is connected with the diffusion bit line between the word lines. An interlayer insulating film is formed on the memory cell array, and the metal bit line is formed with being buried in it.
摘要翻译：平面地减小存储单元阵列的位线的电阻和存储单元阵列的形成区域的减小。与字线成直角运行的各位线由形成在半导体衬底中的扩散位线和扩散位线上侧的线性金属位线构成。扩散位线以相同的方式在金属位线的下侧以线状图案形成，并且金属位线与字线之间的扩散位线连接。在存储单元阵列上形成层间绝缘膜，并且金属位线形成为埋入其中。

6. 发明申请

US20100155822A1 SEMICONDUCTOR MEMORY DEVICE WITH BIT LINE OF SMALL RESISTANCE AND MANUFACTURING METHOD THEREOF 失效
标题翻译：具有小电阻线的半导体存储器件及其制造方法
公开(公告)号：US20100155822A1
公开(公告)日：2010-06-24
申请号：US12717753
申请日：2010-03-04
申请人： Satoshi SHIMIZU
发明人： Satoshi SHIMIZU
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11568 , H01L27/115
摘要： A reduction of a resistance of a bit line of a memory cell array and a reduction of a forming area of the memory cell array are planed.Respective bit lines running at right angles to a word line are composed of a diffusion bit line formed in a semiconductor substrate and a linear metal bit line on an upper side of the diffusion bit line. The diffusion bit line is formed in a linear pattern on a lower side of the metal bit line in the same manner, and the metal bit line is connected with the diffusion bit line between the word lines. An interlayer insulating film is formed on the memory cell array, and the metal bit line is formed with being buried in it.
摘要翻译：平面地减小存储单元阵列的位线的电阻和存储单元阵列的形成区域的减小。与字线成直角运行的各位线由形成在半导体衬底中的扩散位线和扩散位线上侧的线性金属位线构成。扩散位线以相同的方式在金属位线的下侧以线状图案形成，并且金属位线与字线之间的扩散位线连接。在存储单元阵列上形成层间绝缘膜，并且金属位线形成为埋入其中。

7. 发明申请

US20110203439A1 PUNCHING DIE 审中-公开
标题翻译：打孔机
公开(公告)号：US20110203439A1
公开(公告)日：2011-08-25
申请号：US13099875
申请日：2011-05-03
申请人： Yukio TAKAHASHI , Satoshi SHIMIZU , Hiroshi NAKAI
发明人： Yukio TAKAHASHI , Satoshi SHIMIZU , Hiroshi NAKAI
IPC分类号： B26F1/14
CPC分类号： B21D28/34 , B21D45/00 , B21D45/003 , B21D45/006 , B26D7/2628 , Y10T83/2122 , Y10T83/9423 , Y10T83/9428 , Y10T83/9476
摘要： A punch tool is provided. The punch tool may include a punch guide, a punch body movably provided in a vertical direction in the punch guide, a body cap surrounding an upper end of the punch body, wherein the upper end of the punch body is screw-fitted to a screw-fitting part inside of the body cap, and a punch chip detachably provided in the punch body, wherein the punch body is elongated in a radial direction thereof and the punch chip is elongated in the radial direction of the punch body. The punch tool may also include one positioning locking part provided so as to position the punch chip with respect to the punch body, wherein the positioning locking part is located at a position away from a center position of the punch chip.
摘要翻译：提供打孔工具。打孔工具可以包括冲头引导件，在冲头引导件中沿垂直方向可移动地设置的冲头体，围绕冲头本体的上端的主体帽，其中冲头主体的上端螺纹配合到螺钉所述冲头主体在所述冲头主体的径向方向上是细长的，并且所述冲头芯在所述冲头本体的径向方向上是细长的。冲压工具还可以包括一个定位锁定部分，其设置成使冲头芯片相对于冲头本体定位，其中定位锁定部件位于远离冲头芯片的中心位置的位置。

8. 发明申请

US20110313185A1 PRODUCTION PROCESS OF DIALKYL CARBONATE 审中-公开
标题翻译：碳酸二乙酯的生产工艺
公开(公告)号：US20110313185A1
公开(公告)日：2011-12-22
申请号：US13166940
申请日：2011-06-23
申请人： Satoshi SHIMIZU
发明人： Satoshi SHIMIZU
IPC分类号： C07C68/06
CPC分类号： C07C68/065 , C07C68/08 , C07C69/96
摘要： An object of the present invention is to provide an industrially advantageous process for simultaneously producing a symmetric dialkyl carbonate and an asymmetric dialkyl carbonate by performing a transesterification reaction of an alkylene carbonate with two or more kinds of alcohols; and a process for efficiently producing diethyl carbonate in high purity by performing transesterification of ethylene carbonate or propylene carbonate with ethanol. The present invention relates to a process for simultaneously producing a symmetric dialkyl carbonate and an asymmetric dialkyl carbonate, comprising performing a transesterification reaction of an alkylene carbonate with two or more kinds of alcohols in the same reactor, and a process for producing diethyl carbonate, comprising performing a transesterification reaction of ethylene carbonate or propylene carbonate with ethanol, wherein the process comprises a step of subjecting the reaction product obtained in the transesterification reaction to extractive distillation using ethylene glycol or propylene glycol as the extraction solvent to separate by distillation a fraction containing an ether compound.
摘要翻译：本发明的目的是提供一种通过进行碳酸亚烷基酯与两种或更多种醇的酯交换反应同时制备对称的碳酸二烷基酯和不对称二烷基碳酸酯的工业上有利的方法; 以及通过碳酸亚乙酯或碳酸亚丙酯与乙醇的酯交换有效生产高纯度碳酸二乙酯的方法。本发明涉及同时生产对称的碳酸二烷基酯和不对称二烷基碳酸酯的方法，包括在同一反应器中进行碳酸亚烷基酯与两种或更多种醇的酯交换反应，以及生产碳酸二乙酯的方法，包括进行碳酸亚乙酯或碳酸亚丙酯与乙醇的酯交换反应，其中该方法包括使用乙二醇或丙二醇作为提取溶剂进行酯交换反应中得到的反应产物进行萃取蒸馏的步骤，通过蒸馏分离含有醚化合物。

9. 发明申请

US20110186886A1 LED PACKAGE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译： LED封装及其制造方法
公开(公告)号：US20110186886A1
公开(公告)日：2011-08-04
申请号：US12868107
申请日：2010-08-25
申请人： Gen WATARI , Satoshi SHIMIZU , Hiroaki OSHIO , Tatsuo TONEDACHI , Kazuhisa IWASHITA , Tetsuro KOMATSU , Teruo TAKEUCHI
发明人： Gen WATARI , Satoshi SHIMIZU , Hiroaki OSHIO , Tatsuo TONEDACHI , Kazuhisa IWASHITA , Tetsuro KOMATSU , Teruo TAKEUCHI
IPC分类号： H01L33/56 , H01L33/62 , H01L33/48
CPC分类号： H01L33/48 , H01L24/97 , H01L33/56 , H01L33/62 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/97 , H01L2924/01322 , H01L2924/12035 , H01L2924/12041 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are made of a metal material, and disposed to be apart from each other. The LED chip is provided above the first and second lead frames, the LED chip having one terminal connected to the first lead frame and another terminal connected to the second lead frame. The resin body is made of a resin material having a shore D hardness of 25 or higher. In addition, the resin body covers the first and second lead frames and the LED chip. And, an appearance of the resin body is an appearance of the LED package.
摘要翻译：根据一个实施例，LED封装包括第一和第二引线框架，LED芯片和树脂体。第一引线框架和第二引线框架由金属材料制成，并且彼此分开设置。 LED芯片设置在第一引线框架和第二引线框架之上，LED芯片具有连接到第一引线框架的一个端子和连接到第二引线框架的另一个端子。树脂体由肖氏D硬度为25以上的树脂材料制成。此外，树脂体覆盖第一和第二引线框架和LED芯片。并且，树脂体的外观是LED封装的外观。

10. 发明申请

US20090001447A1 SEMICONDUCTOR DEVICE WITH DUMMY ELECTRODE 有权
标题翻译：具有DUMMY电极的半导体器件
公开(公告)号：US20090001447A1
公开(公告)日：2009-01-01
申请号：US12194034
申请日：2008-08-19
申请人： Satoshi SHIMIZU
发明人： Satoshi SHIMIZU
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L27/11521 , H01L21/76897 , H01L27/115 , H01L29/7881 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a gate electrode having a straight portion, a dummy electrode located at a point on the extension of the straight portion, a stopper insulating film, a sidewall insulating film, an interlayer insulating film, and a linear contact portion extending, when viewed from above, parallel to the straight portion. The longer side of the rectangle defined by the linear contact portion is, when viewed from above, located beyond the sidewall insulating film and within the top region of the gate electrode and the dummy electrode. A gap G between the gate electrode and the dummy electrode appearing, when viewed from above, in the linear contact portion is filled with the sidewall insulating film such that the semiconductor substrate is not exposed.
摘要翻译：一种半导体器件包括：具有直线部分的栅极电极，位于直线部分延伸点上的虚拟电极，阻挡绝缘膜，侧壁绝缘膜，层间绝缘膜和延伸的线性接触部分从上方观察，平行于直线部分。当从上方观察时，由线性接触部分限定的矩形的长边位于侧壁绝缘膜之外并且位于栅电极和虚拟电极的顶部区域内。当从上方观察时，在直线接触部分中出现的栅电极和虚拟电极之间的间隙G被填充有侧壁绝缘膜，使得半导体衬底不暴露。

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