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1. 发明申请

US20080148027A1 Method and apparatus of power managment of processor 有权
标题翻译：处理器功率管理方法与装置
公开(公告)号：US20080148027A1
公开(公告)日：2008-06-19
申请号：US11638700
申请日：2006-12-14
申请人： Russell J. Fenger , Anil Aggarwal , Efraim Rotem
发明人： Russell J. Fenger , Anil Aggarwal , Efraim Rotem
IPC分类号： G06F9/06
CPC分类号： G06F1/3203 , G06F1/324 , Y02D10/126
摘要： Briefly, a processor and a method of setting a performance state of a turbo mode enabled processor. The method includes determining an effective performance state over a predetermined time period, calculating a target performance state based on core utilization and the effective performance state over the predetermined time period and setting the turbo mode enabled processor to a turbo mode performance state.
摘要翻译：简而言之，是一种处理器和一种设置turbo模式使能处理器的性能状态的方法。该方法包括在预定时间段内确定有效性能状态，在预定时间段内基于核心利用率和有效性能状态计算目标性能状态，并将启用turbo模式的处理器设置为turbo模式执行状态。

2. 发明授权

US07818596B2 Method and apparatus of power management of processor 有权
标题翻译：处理器电源管理方法及装置
公开(公告)号：US07818596B2
公开(公告)日：2010-10-19
申请号：US11638700
申请日：2006-12-14
申请人： Russell J. Fenger , Anil Aggarwal , Efraim Rotem
发明人： Russell J. Fenger , Anil Aggarwal , Efraim Rotem
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/324 , Y02D10/126
摘要： Briefly, a processor and a method of setting a performance state of a turbo mode enabled processor. The method includes determining an effective performance state over a predetermined time period, calculating a target performance state based on core utilization and the effective performance state over the predetermined time period and setting the turbo mode enabled processor to a turbo mode performance state.
摘要翻译：简而言之，是一种处理器和一种设置turbo模式使能处理器的性能状态的方法。该方法包括在预定时间段内确定有效性能状态，在预定时间段内基于核心利用率和有效性能状态计算目标性能状态，并将启用turbo模式的处理器设置为turbo模式执行状态。

3. 发明申请

US20090089598A1 SYSTEM AND METHOD FOR SELECTING OPTIMAL PROCESSOR PERFORMANCE LEVELS BY USING PROCESSOR HARDWARE FEEDBACK MECHANISMS 有权
标题翻译：使用处理器硬件反馈机制选择最佳处理器性能水平的系统和方法
公开(公告)号：US20090089598A1
公开(公告)日：2009-04-02
申请号：US11864800
申请日：2007-09-28
申请人： Russell J. Fenger , Anil Aggarwal , Shiv Kaushik
发明人： Russell J. Fenger , Anil Aggarwal , Shiv Kaushik
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3243 , Y02D10/126 , Y02D10/152
摘要： An embodiment of the present invention is a system and method relating to adaptive power management using hardware feedback to select optimal processor frequencies and reduce power/watt. In at least one embodiment, the present invention is intended to optimize processor frequency and power/watt usage based on the hardware feedback and processor stall behavior.
摘要翻译：本发明的一个实施例是涉及使用硬件反馈的自适应功率管理以选择最佳处理器频率并降低功率/功率的系统和方法。在至少一个实施例中，本发明旨在基于硬件反馈和处理器失速行为来优化处理器频率和功率/瓦特使用。

4. 发明授权

US07917789B2 System and method for selecting optimal processor performance levels by using processor hardware feedback mechanisms 有权
标题翻译：通过使用处理器硬件反馈机制来选择最佳处理器性能水平的系统和方法
公开(公告)号：US07917789B2
公开(公告)日：2011-03-29
申请号：US11864800
申请日：2007-09-28
申请人： Russell J. Fenger , Anil Aggarwal , Shiv Kaushik
发明人： Russell J. Fenger , Anil Aggarwal , Shiv Kaushik
IPC分类号： G06F1/08
CPC分类号： G06F1/3203 , G06F1/3243 , Y02D10/126 , Y02D10/152
摘要： An embodiment of the present invention is a system and method relating to adaptive power management using hardware feedback to select optimal processor frequencies and reduce power/watt. In at least one embodiment, the present invention is intended to optimize processor frequency and power/watt usage based on the hardware feedback and processor stall behavior.
摘要翻译：本发明的一个实施例是涉及使用硬件反馈的自适应功率管理以选择最佳处理器频率并降低功率/功率的系统和方法。在至少一个实施例中，本发明旨在基于硬件反馈和处理器失速行为来优化处理器频率和功率/瓦特使用。

5. 发明授权

US09081707B2 Apparatus and method for tracking TLB flushes on a per thread basis 有权
标题翻译：用于跟踪TLB在每个线程上刷新的装置和方法
公开(公告)号：US09081707B2
公开(公告)日：2015-07-14
申请号：US13730906
申请日：2012-12-29
申请人： Shaun M. Conrad , Russell J. Fenger , Gaurav Khanna , Rahul Seth , James B. Crossland , Anil Aggarwal
发明人： Shaun M. Conrad , Russell J. Fenger , Gaurav Khanna , Rahul Seth , James B. Crossland , Anil Aggarwal
IPC分类号： G06F12/02 , G06F12/10 , G06F1/32
CPC分类号： G06F12/1027 , G06F1/3206 , G06F2212/683 , Y02D10/13
摘要： A method is described that includes recognizing that TLB information of one or more hardware threads is to be invalidated. The method also includes determining which ones of the one or more hardware threads are in a state in which TLB information is flushed. The method also includes directing a TLB shootdown to those of the or more hardware threads that are in a state in which TLB information is not flushed.
摘要翻译：描述了包括识别一个或多个硬件线程的TLB信息被无效的方法。该方法还包括确定一个或多个硬件线程中的哪一个处于其中刷新TLB信息的状态。该方法还包括将TLB拍摄定向到处于未刷新TLB信息的状态的那些或更多个硬件线程。

6. 发明申请

US20160077576A1 TECHNOLOGIES FOR COLLABORATIVE HARDWARE AND SOFTWARE SCENARIO-BASED POWER MANAGEMENT 审中-公开
标题翻译：协同硬件和软件基于场景的电源管理技术
公开(公告)号：US20160077576A1
公开(公告)日：2016-03-17
申请号：US14488805
申请日：2014-09-17
申请人： Abhinav R. Karhu , Guarav Khanna , Russell J. Fenger
发明人： Abhinav R. Karhu , Guarav Khanna , Russell J. Fenger
IPC分类号： G06F1/32
CPC分类号： G06F1/3246 , G06F1/3206 , G06F1/3234 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： Technologies for collaborative hardware-software power management include a computing device having a processor that supports a low-power idle state. The low-power idle state may be connected standby or a low-power audio playback state. The computing device detects a present usage scenario and determines whether the usage scenario qualifies for a power boost. Qualifying usage scenarios may include low-power audio playback, screen-on interactive use, and I/O-bound workloads. For qualifying usage scenarios, the computing device applies a boosted power management policy that increases power consumption and performance compared to a default power management policy. The default power management policy may base performance and power consumption on recent processor utilization. The computing device may generate one or more hardware hints to increase performance and power consumption, such as increasing the processor p-state or setting the value of an energy performance bias register. Other embodiments are described and claimed.
摘要翻译：用于协作硬件 - 软件电源管理的技术包括具有支持低功率空闲状态的处理器的计算设备。低功率空闲状态可以连接待机或低功率音频播放状态。计算设备检测当前使用情景并确定使用情景是否符合功率提升。合格使用场景可能包括低功耗音频播放，屏幕交互式使用和I / O绑定工作负载。对于符合条件的使用情况，计算设备应用升级的电源管理策略，与默认电源管理策略相比，可提高功耗和性能。默认的电源管理策略可以基于最近处理器利用率的性能和功耗。计算设备可以生成一个或多个硬件提示以增加性能和功耗，例如增加处理器p状态或设置能量性能偏置寄存器的值。描述和要求保护其他实施例。

7. 发明授权

US08898494B2 Power budgeting between a processing core, a graphics core, and a bus on an integrated circuit when a limit is reached 有权
标题翻译：处理核心，图形核心和集成电路总线之间的功率预算，达到极限
公开(公告)号：US08898494B2
公开(公告)日：2014-11-25
申请号：US13398641
申请日：2012-02-16
申请人： Travis T. Schluessler , Russell J. Fenger
发明人： Travis T. Schluessler , Russell J. Fenger
IPC分类号： G06F1/32 , G06F9/50
CPC分类号： G06F1/3206 , G06F1/206 , G06F1/3203 , G06F1/3253 , G06F1/3287 , G06F1/329 , G06F9/50 , G06F9/5094 , Y02D10/16 , Y02D10/171 , Y02D10/22 , Y02D10/24
摘要： An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit.
摘要翻译：这里描述了一种装置，方法和系统，用于基于测量的工作负载有效地平衡处理元件之间的性能和功率。如果处理元件的工作负载表明它是瓶颈，则可能会增加其性能。然而，如果包括处理元件的平台或集成电路已经在功率或热限制下运行，则性能的提高通过另一处理元件的性能的降低或上限来平衡，以保持与功率或热限制的一致性。因此，即使在多个处理元件在功率或热限制下工作时，通过平衡功率分配来识别和缓解瓶颈。

8. 发明授权

US08813080B2 System and method to optimize OS scheduling decisions for power savings based on temporal characteristics of the scheduled entity and system workload 有权
标题翻译：基于调度实体和系统工作负载的时间特征优化用于节电的OS调度决策的系统和方法
公开(公告)号：US08813080B2
公开(公告)日：2014-08-19
申请号：US11770376
申请日：2007-06-28
申请人： Russell J. Fenger , Leena K. Puthiyedath
发明人： Russell J. Fenger , Leena K. Puthiyedath
IPC分类号： G06F9/46 , G06F1/00 , G06F9/30
CPC分类号： G06F9/4893 , Y02D10/24
摘要： In some embodiments, the invention involves a system and method to enhance an operating system's ability to schedule ready threads, specifically to select a logical processor on which to run the ready thread, based on platform policy. Platform policy may be performance-centric, power-centric, or a balance of the two. Embodiments of the present invention use temporal characteristics of the system utilization, or workload, and/or temporal characteristics of the ready thread in choosing a logical processor. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明涉及一种系统和方法，用于增强操作系统调度就绪线程的能力，特别是基于平台策略来选择在其上运行就绪线程的逻辑处理器。平台策略可能是以绩效为中心，以权力为中心，或两者平衡。在选择逻辑处理器时，本发明的实施例使用系统利用率，工作负载的时间特性和/或就绪线程的时间特性。描述和要求保护其他实施例。

9. 发明申请

US20090007120A1 SYSTEM AND METHOD TO OPTIMIZE OS SCHEDULING DECISIONS FOR POWER SAVINGS BASED ON TEMPORAL CHARACTERISTICS OF THE SCHEDULED ENTITY AND SYSTEM WORKLOAD 有权
标题翻译：基于调度实体的时间特征和系统工作负载优化功率节省的操作系统调度决策的系统和方法
公开(公告)号：US20090007120A1
公开(公告)日：2009-01-01
申请号：US11770376
申请日：2007-06-28
申请人： Russell J. Fenger , Leana K. Puthiyedath
发明人： Russell J. Fenger , Leana K. Puthiyedath
IPC分类号： G06F9/46
CPC分类号： G06F9/4893 , Y02D10/24
摘要： In some embodiments, the invention involves a system and method to enhance an operating system's ability to schedule ready threads, specifically to select a logical processor on which to run the ready thread, based on platform policy. Platform policy may be performance-centric, power-centric, or a balance of the two. Embodiments of the present invention use temporal characteristics of the system utilization, or workload, and/or temporal characteristics of the ready thread in choosing a logical processor. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明涉及一种系统和方法，用于增强操作系统调度就绪线程的能力，特别是基于平台策略来选择在其上运行就绪线程的逻辑处理器。平台策略可能是以绩效为中心，以权力为中心，或两者平衡。在选择逻辑处理器时，本发明的实施例使用系统利用率，工作负载的时间特性和/或就绪线程的时间特性。描述和要求保护其他实施例。

10. 发明授权

US06704319B1 Up-tree topology trace for network route tracing 失效
标题翻译：用于网络路由跟踪的up-tree拓扑跟踪
公开(公告)号：US06704319B1
公开(公告)日：2004-03-09
申请号：US09217761
申请日：1998-12-21
申请人： David M. Durham , Russell J. Fenger
发明人： David M. Durham , Russell J. Fenger
IPC分类号： H04L1228
CPC分类号： H04L45/02 , H04L45/48
摘要： A network route tracing system traces a path through a network and identifies network components and communications links affected by the path. According to one embodiment of the present invention, a route is traced between two hosts in a network. The network is represented as a logical tree having a plurality of nodes. Each one of the nodes corresponds to a component in the network and each non-root node has a parent node. Two nodes are identified in the logical tree. A first node corresponds to a first host and a second node corresponding to a second host. If one of the two nodes exists at a lower level of the logical tree, then a first path is traced from the first node at the lower level to the parent node at a higher level until the parent node is at a same level of the logical tree as the second node. The first path is further traced up the logical tree from the parent node and a second path is traced up the logical tree from the second node until the first path and the second path meet at a same node.
摘要翻译：网络路由跟踪系统通过网络跟踪路径，并识别受路径影响的网络组件和通信链路。根据本发明的一个实施例，在网络中的两个主机之间追踪路由。网络被表示为具有多个节点的逻辑树。每个节点对应于网络中的一个组件，每个非根节点都有一个父节点。在逻辑树中标识两个节点。第一节点对应于第一主机和对应于第二主机的第二节点。如果两个节点中的一个存在于逻辑树的较低层，则将第一路径从较低级别的第一节点追溯到较高级别的父节点，直到父节点处于逻辑层的相同级别树作为第二个节点。第一条路径从父节点进一步跟踪逻辑树，第二条路径从第二个节点追溯到逻辑树，直到第一条路径和第二条路径在同一个节点相交。

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