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    • 3. 发明授权
    • Method of fabricating microwave FET having gate with submicron length
    • 制造具有亚微米长度的栅极的微波FET的方法
    • US4935377A
    • 1990-06-19
    • US388627
    • 1989-08-01
    • Walter A. StriflerBrad D. Cantos
    • Walter A. StriflerBrad D. Cantos
    • H01L21/338H01L29/417H01L29/423H01L29/812
    • H01L29/66863H01L29/42316H01L29/8128Y10S148/143Y10S438/944
    • Disclosed is a method of forming a uniform length gate electrode and contact for a microwave field-effect transistor where the gate electrode has a length of less than one micron. A photoresist plug is formed on the surface of a first photoresist layer, the plug functioning as a shadow mask in the subsequent deposition of a plasma-etch-resistant material (aluminum) over the surface of the plug and the first photoresist layer. A third photoresist layer is formed over the device structure whereby a contact region can be formed on the surface of the semiconductor sub-strate adjacent to the device region. Subsequently, the third photoresist layer is removed, and the previously shielded photoresist material over the gate electrode location is removed by plasma etch using the metal-covered plug and metal-covered first photoresist layer as a plasma-etch shield. A metal is then deposited in the exposed surface region for the gate electrode and contact, and thereafter the photoresist material is removed leaving the gate electrode and contact on the substrate surface.
    • 公开了一种形成均匀长度的栅电极和微波场效应晶体管的接触的方法,其中栅电极的长度小于1微米。 在第一光致抗蚀剂层的表面上形成光致抗蚀剂插塞,在随后在插塞和第一光致抗蚀剂层的表面上沉积耐等离子体蚀刻材料(铝)时,插塞用作荫罩。 在器件结构上形成第三光致抗蚀剂层,由此可以在与器件区域相邻的半导体子步骤的表面上形成接触区域。 随后,去除第三光致抗蚀剂层,并且通过使用金属覆盖的塞子和金属覆盖的第一光致抗蚀剂层作为等离子体蚀刻屏蔽层通过等离子体蚀刻去除在栅电极位置上的先前屏蔽的光致抗蚀剂材料。 然后将金属沉积在用于栅电极和接触的暴露表面区域中,然后去除留下栅电极的光致抗蚀剂材料并接触在基板表面上。