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    • 4. 发明授权
    • Picture frame
    • 镜框
    • US4123863A
    • 1978-11-07
    • US750148
    • 1976-12-13
    • Rolf Becker
    • Rolf Becker
    • A47G1/06A47G1/10G09F1/12
    • A47G1/10Y10T403/72
    • A quick-change picture frame, which for changing the picture has to be opened only at one corner and wherein miter cut elastic moldings are connected by a loosenable corner connecting piece at one corner and by firmly attached corner pieces at all other corners. Within the molding grooves are provided into which the edges of the corner pieces are fitted. The loosenable corner piece comprises a plate which is pivotably attached to the end section of one of the moldings, which form the openable corner, and has a guiding groove, which cooperates with a guide projection on the second molding of this corner in order to lock the corner piece when the frame is closed.
    • 用于改变图像的快速变化的画框只能在一个角落打开,其中斜切的弹性模制件通过一个角落处的可松开的角连接件和在所有其他角部处牢固地附接的角件连接。 在设置角部件的边缘的成形凹槽内。 可松动的角件包括一个可枢转地附接到一个模制品的端部的板,该板形成可打开的角部,并且具有导向槽,该导向槽与该拐角的第二模制件上的引导突起配合,以便锁定 框架关闭时的角件。
    • 5. 发明申请
    • System with a clocked interface
    • 系统具有时钟接口
    • US20050105628A1
    • 2005-05-19
    • US10498143
    • 2002-12-09
    • Stephan KochGerd SchellerRolf Becker
    • Stephan KochGerd SchellerRolf Becker
    • H04L7/04G06F13/40H04L27/00
    • G06F13/4072Y02D10/14Y02D10/151
    • A system with a transmitter for transmitting digital data via an interface to a receiver. The interface has at least one data line and a clock line. A clock generator supplies a clock signal to the clock line. The receiver uses the clock signal received from the clock line for deriving timing information for processing received digital data. The clock signal may have an amplitude that is lower than the power supply voltage VDD, typically less than half of the power supply voltage, and less stringent requirements can be applied to the waveform of the clock signal than traditionally applied to data and clock signals. The clock signals are hereby less power consuming and cause significantly less electromagnetic interference.
    • 具有用于经由接口将数字数据发送到接收器的发射器的系统。 该接口至少有一条数据线和一条时钟线。 时钟发生器向时钟线提供时钟信号。 接收机使用从时钟线接收的时钟信号来导出用于处理接收的数字数据的定时信息。 时钟信号可能具有低于电源电压VDD的幅度,通常小于电源电压的一半,并且对于比传统上应用于数据和时钟信号的时钟信号的波形不太严格的要求。 因此,时钟信号的功耗较小,并且导致显着较小的电磁干扰。
    • 7. 发明授权
    • Antilock brake adjusting system
    • 防爆制动调节系统
    • US5213398A
    • 1993-05-25
    • US689272
    • 1991-06-12
    • Rolf Becker
    • Rolf Becker
    • B60T8/58B60T8/00B60T8/1761B60T8/72
    • B60T8/17616B60T2210/16
    • Antilock control system generates an instability criterion from at least one of slip and deceleration of the wheels and produces control signals for reducing brake pressure at the wheels when the criterion exceeds an instability threshold. The system delays the criterion reaching the threshold, for example by increasing the threshold, when vehicle deceleration increases and when downhill travel is determined. The instability criterion S may be calculated according to S=aV+bL+c.intg.Ldt, where V is the wheel deceleration, L is the wheel slip, and a, b, and c are constants.
    • PCT No.PCT / EP89 / 01381 Sec。 371日期1991年6月12日 102(e)1991年6月12日PCT PCT 1991年11月16日PCT公布。 出版物WO90 / 06870 日期:1990年6月28日。非锁定控制系统从车轮的滑差和减速度中的至少一个产生不稳定性标准,并且当标准超过不稳定性阈值时产生用于减小车轮处的制动压力的控制信号。 系统延迟达到阈值的标准,例如通过增加阈值,当车辆减速度增加时以及确定下坡行驶时。 不稳定性标准S可以根据S = aV + bL + c INTEGRAL Ldt计算,其中V是车轮减速度,L是车轮滑移,a,b和c是常数。
    • 9. 发明申请
    • Input stage resistant against negative voltage swings
    • 输入级可抵抗负电压摆幅
    • US20060164058A1
    • 2006-07-27
    • US10564537
    • 2004-07-08
    • Rolf BeckerWillem GroenewegWolfgang Kemper
    • Rolf BeckerWillem GroenewegWolfgang Kemper
    • G05F5/00
    • H01L27/0251
    • Apparatus (10) comprising a level shifter (15) connectable to a signal input (1) for receiving an input signal (s(t)) with a negative signal swing. The level shifter (15) provides for a DC shift of the input signal (s(t)) to provide an output signal (r(t)) with positive signal swing. The level shifter (15) comprises an amplifier (17) with a first input (11), a second input (12), and an output (13). A first capacitor (C1), a second capacitor (C2), a reference voltage supply (16), and a transistor (14; 74) serving as a switch, are arranged in a network as follows: the first capacitor (C1) is arranged between the signal input (1) and the first input (11), the second capacitor (C2) is arranged in a feedback-loop (18) between the output (13) and the first input (11), and the reference voltage supply (16) is connected to the second input (12). The transistor (14) is arranged in a branch (19) that bridges the second capacitor (C2), whereby a control signal (CNTRL) is applicable to a gate (14.1) of the transistor (14) in order to allow the level shifter (15) to be reset from time to time.
    • 装置(10)包括可连接到信号输入端(1)的电平移位器(15),用于接收具有负信号摆幅的输入信号(s(t))。 电平移位器(15)提供输入信号(s(t))的DC移位,以提供具有正信号摆幅的输出信号(r(t))。 电平移位器(15)包括具有第一输入(11),第二输入(12)和输出(13)的放大器(17)。 作为开关的第一电容器(C 1),第二电容器(C 2),参考电压源(16)和晶体管(14; 74)如下布置:第一电容器(C 1)布置在信号输入(1)和第一输入(11)之间,第二电容器(C 2)布置在输出(13)和第一输入(11)之间的反馈环路(18)中, 并且参考电压源(16)连接到第二输入端(12)。 晶体管(14)布置在桥接第二电容器(C 2)的分支(19)中,由此控制信号(CNTRL)可应用于晶体管(14)的栅极(14.1),以便允许电平 移位器(15)不时复位。