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1. 发明申请

US20100117121A1 MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY 失效
标题翻译：用于非易失性存储器的MIRRORED-GATE单元
公开(公告)号：US20100117121A1
公开(公告)日：2010-05-13
申请号：US12389817
申请日：2009-02-20
申请人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
发明人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
IPC分类号： H01L27/085
CPC分类号： H01L27/0207 , H01L27/105 , H01L27/11803 , H01L27/228 , H01L27/2436 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233
摘要： A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.
摘要翻译：一种存储器，包括至少一个可操作地连接到位线，源极线和字线的存储单元。存储单元包括具有第一源极触点，第二源极触点和第一源极触点和第二源极触点之间的位接触的基板，电连接第一源极触点和位触点的第一晶体管栅极和第二晶体管栅极电连接位触点和第二源触点。字线将第一晶体管栅极电连接到第二晶体管栅极。

2. 发明申请

US20120037875A1 MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY 有权
标题翻译：用于非易失性存储器的MIRRORED-GATE单元
公开(公告)号：US20120037875A1
公开(公告)日：2012-02-16
申请号：US13280392
申请日：2011-10-25
申请人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
发明人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
IPC分类号： H01L45/00
CPC分类号： H01L27/0207 , H01L27/105 , H01L27/11803 , H01L27/228 , H01L27/2436 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233
摘要： A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.
摘要翻译：一种存储器，包括至少一个可操作地连接到位线，源极线和字线的存储单元。存储单元包括具有第一源极触点，第二源极触点和第一源极触点和第二源极触点之间的位接触的基板，电连接第一源极触点和位触点的第一晶体管栅极和第二晶体管栅极电连接位触点和第二源触点。字线将第一晶体管栅极电连接到第二晶体管栅极。

3. 发明授权

US08324607B2 Mirrored-gate cell for non-volatile memory 有权
标题翻译：用于非易失性存储器的镜像门单元
公开(公告)号：US08324607B2
公开(公告)日：2012-12-04
申请号：US13280392
申请日：2011-10-25
申请人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
发明人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
IPC分类号： H01L47/00
CPC分类号： H01L27/0207 , H01L27/105 , H01L27/11803 , H01L27/228 , H01L27/2436 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233
摘要： A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.
摘要翻译：一种存储器，包括至少一个可操作地连接到位线，源极线和字线的存储单元。存储单元包括具有第一源极触点，第二源极触点和第一源极触点和第二源极触点之间的位接触的基板，电连接第一源极触点和位触点的第一晶体管栅极和第二晶体管栅极电连接位触点和第二源触点。字线将第一晶体管栅极电连接到第二晶体管栅极。

4. 发明授权

US08053749B2 Mirrored-gate cell for non-volatile memory 失效
标题翻译：用于非易失性存储器的镜像门单元
公开(公告)号：US08053749B2
公开(公告)日：2011-11-08
申请号：US12389817
申请日：2009-02-20
申请人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
发明人： Roger Glenn Rolbiecki , Andrew Carter , Yong Lu
IPC分类号： H01L47/00
CPC分类号： H01L27/0207 , H01L27/105 , H01L27/11803 , H01L27/228 , H01L27/2436 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233
摘要： A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.
摘要翻译：一种存储器，包括至少一个可操作地连接到位线，源极线和字线的存储单元。存储单元包括具有第一源极触点，第二源极触点和第一源极触点和第二源极触点之间的位接触的基板，电连接第一源极触点和位触点的第一晶体管栅极和第二晶体管栅极电连接位触点和第二源触点。字线将第一晶体管栅极电连接到第二晶体管栅极。

5. 发明授权

US08098513B2 Memory array with read reference voltage cells 有权
标题翻译：具有读取参考电压单元的存储器阵列
公开(公告)号：US08098513B2
公开(公告)日：2012-01-17
申请号：US13088610
申请日：2011-04-18
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.
摘要翻译：本公开涉及具有读取参考电压单元的存储器阵列。特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较并确定所选存储单元是处于高电阻状态还是低电阻状态。这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

6. 发明申请

US20100067282A1 MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS 失效
标题翻译：存储器阵列，带有读参考电压电池
公开(公告)号：US20100067282A1
公开(公告)日：2010-03-18
申请号：US12212798
申请日：2008-09-18
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00 , G11C7/02 , G11C7/22 , G11C11/14
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.
摘要翻译：本公开涉及具有读取参考电压单元的存储器阵列。特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较并确定所选存储单元是处于高电阻状态还是低电阻状态。这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

7. 发明授权

US07936588B2 Memory array with read reference voltage cells 有权
标题翻译：具有读取参考电压单元的存储器阵列
公开(公告)号：US07936588B2
公开(公告)日：2011-05-03
申请号：US12789691
申请日：2010-05-28
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.
摘要翻译：本公开涉及具有读取参考电压单元的存储器阵列。特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较并确定所选存储单元是处于高电阻状态还是低电阻状态。这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

8. 发明授权

US07755923B2 Memory array with read reference voltage cells 失效
标题翻译：具有读取参考电压单元的存储器阵列
公开(公告)号：US07755923B2
公开(公告)日：2010-07-13
申请号：US12212798
申请日：2008-09-18
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.
摘要翻译：本公开涉及具有读取参考电压单元的存储器阵列。特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较并确定所选存储单元是处于高电阻状态还是低电阻状态。这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

9. 发明申请

US20110194330A1 MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS 有权
标题翻译：存储器阵列，带有读参考电压电池
公开(公告)号：US20110194330A1
公开(公告)日：2011-08-11
申请号：US13088610
申请日：2011-04-18
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.
摘要翻译：本公开涉及具有读取参考电压单元的存储器阵列。特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较并确定所选存储单元是处于高电阻状态还是低电阻状态。这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

10. 发明申请

US20100232211A1 MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS 有权
公开(公告)号：US20100232211A1
公开(公告)日：2010-09-16
申请号：US12789691
申请日：2010-05-28
申请人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
发明人： Hongyue Liu , Yong Lu , Andrew Carter , Yiran Chen , Hai Li
IPC分类号： G11C11/00 , G11C7/02 , G11C7/00
CPC分类号： G11C7/14 , G11C11/1673
摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.

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