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1. 发明授权

US4910737A Bistable optical device comprising a lightly doped optical fibre 失效
标题翻译：双稳态光学器件包括轻掺杂光纤
公开(公告)号：US4910737A
公开(公告)日：1990-03-20
申请号：US195638
申请日：1988-07-21
申请人： David N. Payne , Robert J. Mears , Simon B. Poole , Laurence Reekie
发明人： David N. Payne , Robert J. Mears , Simon B. Poole , Laurence Reekie
IPC分类号： G02B6/00 , G02F1/35 , G02F3/02 , H01S3/06 , H01S3/067 , H01S3/0943 , H01S3/0947 , H01S3/17 , H04B10/02 , H04B10/28
CPC分类号： H01S3/067 , G02F3/02
摘要： A fibre laser (1) of the type comprising a doped single-mode optical fibre (3) arranged between reflectors (5,7), and which is coupled (11) to an optical pumping source (9). For the given reflection efficiency of the reflectors (5,7), the length of the optical fibre (3) is chosen such that it exceeds that affording saturation and provides at its end a region for absorption (FIG. 1). The resultant hysteretic behavior of this bistable device may be utilized for logic memory (bistable), and regenerative amplification applications. To this end a second source (9') can be coupled (11',19) to the laser fibre (3).
摘要翻译： PCT No.PCT / GB87 / 00668 Sec。 371日期：1988年7月21日 102（e）日期1988年7月21日PCT提交1987年9月22日PCT公布。出版物WO88 / 02133 日期：1988年3月24日。一种光纤激光器（1），其包括布置在反射器（5,7）之间的掺杂单模光纤（3），并且被耦合（11）到光泵浦源）。对于反射器（5,7）的给定反射效率，选择光纤（3）的长度使其超过提供饱和度并且在其末端提供用于吸收的区域（图1）。双稳态器件的滞后行为可用于逻辑存储器（双稳态）和再生放大应用。为此，第二源（9'）可以耦合（11'，19）到激光光纤（3）。

2. 发明授权

US4955025A Fibre-optic lasers and amplifiers 失效
标题翻译：光纤激光器和放大器
公开(公告)号：US4955025A
公开(公告)日：1990-09-04
申请号：US326458
申请日：1989-03-20
申请人： Robert J. Mears , Laurence Reekie , Simon B. Poole , David N. Payne
发明人： Robert J. Mears , Laurence Reekie , Simon B. Poole , David N. Payne
IPC分类号： H01S3/07 , C03B37/018 , G02B6/02 , G02B6/34 , H01S3/06 , H01S3/067 , H01S3/083 , H01S3/091 , H01S3/10 , H01S3/17 , H04B10/02 , H04B10/28
CPC分类号： H01S3/17 , C03B37/018 , C03B37/01807 , G02B6/02 , H01S3/067 , H01S3/083 , C03B2201/34 , C03B2201/40 , G02B6/29359 , G02B6/29395
摘要： An active device (FIG. 1) comprising a length of doped fiber (1) and an end-coupled pump source (11). The fiber (1) is of single-mode geometry and incorporates rare-earth or transition metal dopant ions. These latter are incorporated at a low-level uniform concentration (.ltorsim.900 ppm). The fiber host (1) selected exhibits an inherently ultra low attentuation loss (.ltorsim.40 dB/km) at the emission wavelength. The fibers (1) are generally of long length (e.g. 5 m to 300 m) and may be coiled for compact packaging. The fiber (1) may be formed as part of a Fabry-Perot cavity (1, 7, 9); or, as a ring cavity (FIG. 8) using a doped fiber coupler (29) spliced to form a ring (27). Q-switch and mode-locking devices (19) and gratings (25) may be included as part of the Fabry-Perot cavity to allow pulse-mode operation and/or wavelength tuning, respectively. The fiber (1) may also be utilised as an amplifier.

3. 发明授权

US4787927A Fabrication of optical fibers 失效
标题翻译：光纤制造
公开(公告)号：US4787927A
公开(公告)日：1988-11-29
申请号：US64943
申请日：1987-04-09
申请人： Robert J. Mears , Laurence Reekie , Simon B. Poole , David N. Payne
发明人： Robert J. Mears , Laurence Reekie , Simon B. Poole , David N. Payne
IPC分类号： H01S3/07 , C03B37/018 , G02B6/02 , G02B6/34 , H01S3/06 , H01S3/067 , H01S3/083 , H01S3/091 , H01S3/10 , H01S3/17 , H04B10/02 , H04B10/28 , C03B37/023
CPC分类号： H01S3/17 , C03B37/018 , C03B37/01807 , G02B6/02 , H01S3/067 , H01S3/083 , C03B2201/34 , C03B2201/40 , G02B6/29359 , G02B6/29395
摘要： A method of making a preform for drawing optical fibers includes the steps of depositing a dopant material 3 in a dopant carrier chamber 1, heating the dopant material to cause it to vaporise at a predetermined rate, depositing from a mixture of a source material (GeCl.sub.4, SiO.sub.4, O.sub.2) and said vaporised dopant a mixture of solid components 8 and fusing said solid components to form a doped glass.
摘要翻译： PCT No.PCT / GB86 / 00484 Sec。 371日期1987年4月9日 102（e）日期1987年4月9日PCT申请日1986年8月13日PCT公布。第WO87 / 01110号公报日本1987年2月26日。制造用于拉制光纤的预成型件的方法包括以下步骤：在掺杂剂载体室1中沉积掺杂剂材料3，加热掺杂剂材料以使其以预定速率蒸发，从源材料（GeCl 4，SiO 4，O 2）和所述汽化掺杂剂的混合物是固体组分8的混合物，并将所述固体组分熔合以形成掺杂的玻璃。

4. 发明授权

US07880161B2 Multiple-wavelength opto-electronic device including a superlattice 有权
标题翻译：多波长光电器件包括超晶格
公开(公告)号：US07880161B2
公开(公告)日：2011-02-01
申请号：US11675833
申请日：2007-02-16
申请人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
发明人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
IPC分类号： H01L29/06
CPC分类号： H01L31/035236 , B82Y20/00 , H01L29/15 , H01L31/076 , H01L33/06 , H01L33/08 , H01L33/28 , H01S5/3072 , Y02E10/548
摘要： A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.
摘要翻译：多波长光电器件可以包括衬底和由衬底承载并在不同的相应波长下操作的多个有源光学器件。每个光学器件可以包括超晶格，其包括多个堆叠的层组，并且每组层可以包括限定基极半导体部分和其上的至少一个非半导体单层的多个堆叠的半导体单层。

5. 发明授权

US07435988B2 Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel 有权
标题翻译：包括具有带状工程超晶格的MOSFET的半导体器件，其具有提供沟道的半导体盖层
公开(公告)号：US07435988B2
公开(公告)日：2008-10-14
申请号：US11042270
申请日：2005-01-25
申请人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
发明人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , H01L21/823807 , H01L29/155 , H01L29/7833
摘要： A semiconductor device may include a substrate and at least one MOSFET adjacent the substrate including a superlattice. The superlattice may include a plurality of stacked groups of layers and a semiconductor cap layer on an uppermost group of layers. Each group of layers of the superlattice may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The MOSFET may further include source, drain, and gate regions defining a channel through at least a portion of the semiconductor cap layer.
摘要翻译：半导体器件可以包括衬底和与包括超晶格的衬底相邻的至少一个MOSFET。超晶格可以包括多个堆叠的层组，并且在最上层组上可以包括半导体盖层。超晶格的每组层可以包括限定基极半导体部分的多个堆叠的基底半导体单层和限制在相邻的基极半导体部分的晶格内的至少一个非半导体单层。 MOSFET还可以包括通过半导体盖层的至少一部分限定沟道的源极，漏极和栅极区域。

6. 发明授权

US07303948B2 Semiconductor device including MOSFET having band-engineered superlattice 有权
标题翻译：包括具有带工程超晶格的MOSFET的半导体器件
公开(公告)号：US07303948B2
公开(公告)日：2007-12-04
申请号：US11089950
申请日：2005-03-25
申请人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
发明人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
IPC分类号： H01L21/336
CPC分类号： H01L29/1054 , H01L21/823807 , H01L29/155 , H01L29/7833
摘要： A semiconductor device includes a substrate, and at least one MOSFET adjacent the substrate. The MOSFET may include a superlattice channel that, in turn, includes a plurality of stacked groups of layers. The MOSFET may also include source and drain regions laterally adjacent the superlattice channel, and a gate overlying the superlattice channel for causing transport of charge carriers through the superlattice channel in a parallel direction relative to the stacked groups of layers. Each group of the superlattice channel may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice channel may have a higher charge carrier mobility in the parallel direction than would otherwise occur.
摘要翻译：半导体器件包括衬底和与衬底相邻的至少一个MOSFET。 MOSFET可以包括超晶格通道，其又包括多个堆叠的层组。 MOSFET还可以包括横向邻近超晶格沟道的源极和漏极区域，以及覆盖超晶格沟道的栅极，用于使电荷载流子相对于堆叠的层组在平行方向上通过超晶格沟道传输。每组超晶格通道可以包括限定基极半导体部分的多个层叠的基底半导体单层，以及其上的能带修饰层。能带修改层可以包括约束在相邻基底半导体部分的晶格内的至少一个非半导体单层，使得超晶格通道可以在平行方向上具有比否则发生的更高的载流子迁移率。

7. 发明授权

US06891188B2 Semiconductor device including band-engineered superlattice 有权
公开(公告)号：US06891188B2
公开(公告)日：2005-05-10
申请号：US10717374
申请日：2003-11-19
申请人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
发明人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
IPC分类号： H01L21/8238 , H01L29/10 , H01L29/15 , H01L29/78 , H01L29/06
CPC分类号： H01L29/152 , B82Y10/00 , H01L21/823807 , H01L29/1054 , H01L29/155 , H01L29/7833
摘要： A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

8. 发明授权

US06833294B1 Method for making semiconductor device including band-engineered superlattice 有权
公开(公告)号：US06833294B1
公开(公告)日：2004-12-21
申请号：US10716783
申请日：2003-11-19
申请人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
发明人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
IPC分类号： H01L2120
CPC分类号： H01L29/155 , H01L21/823807 , H01L29/1054 , H01L29/7833
摘要： A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.

9. 发明授权

US07812339B2 Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures 有权
标题翻译：制造半导体器件的方法，其包括在STI形成和相关结构之后具有无掩模超晶格沉积的浅沟槽隔离（STI）区域
公开(公告)号：US07812339B2
公开(公告)日：2010-10-12
申请号：US12102305
申请日：2008-04-14
申请人： Robert J. Mears , Kalipatnam Vivek Rao
发明人： Robert J. Mears , Kalipatnam Vivek Rao
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , H01L21/76237 , H01L29/1033 , H01L29/15
摘要： A semiconductor device may include a semiconductor substrate having a surface, a shallow trench isolation (STI) region in the semiconductor substrate and extending above the surface thereof, and a superlattice layer adjacent the surface of the semiconductor substrate and comprising a plurality of stacked groups of layers. More particularly, each group of layers of the superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Moreover, at least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer. The semiconductor device may further include a lateral spacer between the superlattice layer and the STI region and which may include a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion.
摘要翻译：半导体器件可以包括在半导体衬底中具有表面，浅沟槽隔离（STI）区域并在其表面之上延伸的半导体衬底和邻近半导体衬底的表面的超晶格层，并且包括多个层叠的层。更具体地，超晶格层的每组层可以包括限定基极半导体部分的多个堆叠的基底半导体单层和限制在相邻的基极半导体部分的晶格内的至少一个非半导体单层。此外，来自相对的基底半导体部分的至少一些原子可以与穿过至少一个介入的非半导体单层的化学键化学地结合在一起。半导体器件还可以包括在超晶格层和STI区之间的横向间隔物，并且其可以包括下部非单晶半导体超晶格部分和上部电介质部分。

10. 发明授权

US07718996B2 Semiconductor device comprising a lattice matching layer 有权
标题翻译：包括晶格匹配层的半导体器件
公开(公告)号：US07718996B2
公开(公告)日：2010-05-18
申请号：US11677098
申请日：2007-02-21
申请人： Ilija Dukovski , Robert John Stephenson , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Robert J. Mears , Xiangyang Huang , Marek Hytha
发明人： Ilija Dukovski , Robert John Stephenson , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Robert J. Mears , Xiangyang Huang , Marek Hytha
IPC分类号： H01L29/06
CPC分类号： H01L29/155 , H01L21/0237 , H01L21/02381 , H01L21/02439 , H01L21/0245 , H01L21/02488 , H01L21/02499 , H01L21/02507 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/28194 , H01L21/28255 , H01L29/1079 , H01L29/1083 , H01L29/152 , H01L29/51 , H01L29/513 , H01L29/78
摘要： A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. The superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.
摘要翻译：半导体器件可以包括包含具有第一晶格常数的第一材料的第一单晶层。第二单晶层可以包括具有不同于第一晶格常数的第二晶格常数的第二材料。该器件还可以包括第一和第二单晶层之间的晶格匹配层并且包括超晶格。超晶格可以包括多组层，并且每组层可以包括多个层叠的半导体单层，其限定半导体基底部分和至少一个非半导体单层。至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。

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