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    • 2. 发明授权
    • High performance path allocation system and method with fairness
insurance mechanism for a fiber optic switch
    • 高性能路径分配系统和方法与光纤交换机的公平保险机制
    • US5528584A
    • 1996-06-18
    • US330273
    • 1994-10-27
    • Robert H. GrantBent StoevhaseRobin PurohitGregory T. SullivanDavid Book
    • Robert H. GrantBent StoevhaseRobin PurohitGregory T. SullivanDavid Book
    • H04B10/20H04B10/02H04L12/56H04J14/08
    • H04L49/357H04L49/3009H04L49/351
    • A fiber optic switch interconnects fiber optic channels so that a fiber optic network can be implemented. Channel modules provide ports (p1-pi) for connection of the fiber optic channels. Each channel module has a receive memory for temporarily storing incoming data frames from the fiber optic channels associated therewith. A switch module having a data distribution network interconnects each of the channel modules and permits ultimate connection of a source channel to a destination channel. A path allocation system, which controls the switch module, allocates the data paths between the channels. The path allocation system has a scheduler which maintains a destination queue (Q.sub.p1 -Q.sub.pi) for each of the channels, a sentry which determines when a new data frame is ready to be routed, and an arbitrator which arbitrates port availability and which grants transfer requests proposed by the scheduler. Significantly, the arbitrator is equipped with fairness insurance mechanisms for insuring that transfer requests are always timely and efficiently serviced.
    • 光纤交换机将光纤通道互连,从而实现光纤网络。 通道模块提供用于连接光纤通道的端口(p1-pi)。 每个通道模块具有接收存储器,用于临时存储与其相关联的光纤通道的输入数据帧。 具有数据分配网络的交换机模块互连每个信道模块并允许源信道到目的信道的最终连接。 控制交换机模块的路径分配系统在通道之间分配数据路径。 路径分配系统具有维护每个信道的目的地队列(Qp1-Qpi)的调度器,确定新数据帧何时准备路由的哨兵以及仲裁端口可用性并授予传送请求的仲裁器 由调度程序提出。 重要的是,仲裁员配备了公平的保险机制,确保转移请求始终及时有效地服务。
    • 3. 发明授权
    • High performance frame time monitoring system and method for a fiber
optic switch for a fiber optic network
    • 用于光纤网络的光纤交换机的高性能帧时间监控系统和方法
    • US5548590A
    • 1996-08-20
    • US380766
    • 1995-01-30
    • Robert H. GrantDavid BookGregory T. Sullivan
    • Robert H. GrantDavid BookGregory T. Sullivan
    • H04B10/08H04B10/02H04L12/26H04L12/56H04L29/14
    • H04L43/00H04L12/2602H04L49/357H04L43/0876H04L49/30H04L49/351
    • A frame time monitoring system tracks the time in which data frames reside within a fiber optic switch for a fiber optic network. The network switch transfers data frames from source ports to destination ports. The frame time monitoring system comprises a digital signal processor (DSP), which is configured by a software program to implement a plurality of timers relative to frames to be routed through the switch from a source port to a destination port. The processor operates as an incrementer and is configured to output a series of sequential timer states corresponding to each particular frame. The timer states are generally indicative of the amount of time in which the frame has resided in the switch. A logic network of logic gates is connected to the processor to receive and interpret the timer states. The logic network has frame busy (FBSY) and delete mechanisms for determining elapse of respective FBSY and delete time periods based upon the timer states. The FBSY and delete mechanisms generate respective FBSY and delete signals after the elapse of the periods, which can vary for optimization reasons depending upon frame class and type. Thus, in the foregoing configuration, a processor is utilized as a timing incrementer and logical decisions are allocated to the logic network, resulting in an optimum balance between hardware and software so as to minimize cost, space requirements, and complexity, and maximize frame tracking resolution.
    • 帧时间监视系统跟踪数据帧驻留在用于光纤网络的光纤交换机内的时间。 网络交换机将数据帧从源端口传输到目标端口。 帧时间监视系统包括数字信号处理器(DSP),其由软件程序配置,以实现相对于要通过交换机从源端口到目的地端口路由的帧的多个定时器。 处理器作为增量器操作,并且被配置为输出对应于每个特定帧的一系列顺序定时器状态。 定时器状态通常表示帧已经驻留在交换机中的时间量。 逻辑门的逻辑网络连接到处理器以接收和解释定时器状态。 逻辑网络具有帧忙(FBSY)和删除用于基于定时器状态确定相应FBSY的经过和删除时间段的机制。 FBSY和删除机制在经过周期后产生相应的FBSY和删除信号,这可以根据帧类和类型的优化原因而变化。 因此,在上述配置中,处理器被用作定时增量器并且将逻辑判决分配给逻辑网络,从而在硬件和软件之间达到最佳平衡,从而最小化成本,空间需求和复杂性,并且最大化帧跟踪 解析度。