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    • 8. 发明授权
    • Method and apparatus for electronically aligning capacitively coupled mini-bars
    • 用于电容对齐电容耦合迷你条的方法和装置
    • US07384804B2
    • 2008-06-10
    • US11125792
    • 2005-05-09
    • Robert J. DrostIvan E. SutherlandWilliam S. Coates
    • Robert J. DrostIvan E. SutherlandWilliam S. Coates
    • H01L21/66
    • H01L25/0657H01L23/48H01L25/50H01L2224/16H01L2225/06513H01L2225/06531H01L2225/06593H01L2924/00011H01L2924/00014H01L2924/01067H01L2224/0401
    • One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system measures an alignment between a first chip and a second chip. The system then selects a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment. In this way, the system allows a data signal to be distributed to and transmitted by the mini-bars that form the transmitter bit position. The system also selects a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment. Next, the system associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment. In this way, the system allows data signals transmitted by the mini-bars within a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.
    • 本发明的一个实施例提供了一种系统,其电子地对准位于面对面的不同半导体芯片上的迷你条,以促进半导体芯片之间通过电容耦合的通信。 在操作期间,系统测量第一芯片和第二芯片之间的对准。 然后,系统在第一芯片上选择一组发射器迷你条,以基于测量的对准来形成发射机位置。 以这种方式,该系统允许将数据信号分配到形成发送器位位置的迷你条并发送。 该系统还在第二芯片上选择一组接收器迷你条,以形成基于测量对准的接收器位位置。 接下来,系统基于测量的对准将第一芯片上的发射机位位置与第二芯片上的接收器位置相关联。 以这种方式,系统允许由第一芯片上的发送器位置内的迷你条发送的数据信号由第二芯片上相关联的接收器位位置内的迷你条集中接收。
    • 10. 发明申请
    • ASYNCHRONOUS FIFO CIRCUIT FOR LONG-DISTANCE ON-CHIP COMMUNICATION
    • 用于长距离片上通信的异步FIFO电路
    • US20120128037A1
    • 2012-05-24
    • US12954474
    • 2010-11-24
    • William S. CoatesRobert J. DrostJosephus C. Ebergen
    • William S. CoatesRobert J. DrostJosephus C. Ebergen
    • H04B3/36G06F3/00
    • H04B3/36
    • The disclosed embodiments provide a first-in, first-out (FIFO) circuit that operates asynchronously. The FIFO circuit includes a data path that contains data latches sequentially connected through data-wire segments. The FIFO circuit also includes a control circuit that generates control signals for the data latches so that the data path behaves like a FIFO. The control circuit includes control components sequentially connected to each other through control-wire segments and repeaters located within the control-wire segments. The control components are configured to asynchronously generate the control signals for the data latches, and the repeaters are configured to repeat asynchronous signals communicated between the asynchronous control components.
    • 所公开的实施例提供异步操作的先入先出(FIFO)电路。 FIFO电路包括包含通过数据线段顺序连接的数据锁存器的数据路径。 FIFO电路还包括一个控制电路,该控制电路为数据锁存器产生控制信号,使得数据通路的行为类似于FIFO。 控制电路包括通过控制线段和位于控制线段内的中继器而相互连接的控制组件。 控制组件被配置为异步地生成用于数据锁存器的控制信号,并且中继器被配置为重复异步控制组件之间传送的异步信号。