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1. 发明授权

US07461268B2 E-fuses for storing security version data 失效
标题翻译：用于存储安全版本数据的电子保险丝
公开(公告)号：US07461268B2
公开(公告)日：2008-12-02
申请号：US10892431
申请日：2004-07-15
申请人： Robert A. Drehmel , William E. Hall , Russell D. Hoover
发明人： Robert A. Drehmel , William E. Hall , Russell D. Hoover
IPC分类号： G06F12/14 , H04L9/32
CPC分类号： G06F21/72 , G06F21/75 , G11C17/16 , H04L9/3236
摘要： Methods and devices that may be utilized in systems to dynamically update a security version parameter used to encrypt secure data are provided. The version may be maintained in persistent storage located on a device implementing the encryption, such as a system on a chip (SOC). The persistent storage does not require battery backing and, thus, the cost and complexity associated with conventional systems utilizing battery backed storage may be reduced.
摘要翻译：提供了可用于系统动态更新用于加密安全数据的安全版本参数的方法和设备。该版本可以被维护在位于实现加密的设备上的持久存储器中，诸如片上系统（SOC）。永久存储器不需要电池背衬，因此，与使用电池支持的存储器的常规系统相关联的成本和复杂度可能会降低。

2. 发明申请

US20080175381A1 E-FUSES FOR STORING SECURITY VERSION DATA 审中-公开
公开(公告)号：US20080175381A1
公开(公告)日：2008-07-24
申请号：US12057207
申请日：2008-03-27
申请人： Robert A. Drehmel , William E. Hall , Russell D. Hoover
发明人： Robert A. Drehmel , William E. Hall , Russell D. Hoover
IPC分类号： H04K1/00 , H04L9/32
CPC分类号： G06F21/72 , G11C17/16 , H04L9/3236
摘要： Methods and devices that may be utilized in systems to dynamically update a security version parameter used to encrypt secure data are provided. The version may be maintained in persistent storage located on a device implementing the encryption, such as a system on a chip (SOC). The persistent storage does not require battery backing and, thus, the cost and complexity associated with conventional systems utilizing battery backed storage may be reduced.

3. 发明申请

US20080288780A1 LOW-LATENCY DATA DECRYPTION INTERFACE 有权
标题翻译：低数据数据分解接口
公开(公告)号：US20080288780A1
公开(公告)日：2008-11-20
申请号：US12142007
申请日：2008-06-19
申请人： BRUCE L. BEUKEMA , Robert A. Drehmel , William E. Hall , Jamie R. Kuesel , Gilad Pivonia , Robert A. Shearer
发明人： BRUCE L. BEUKEMA , Robert A. Drehmel , William E. Hall , Jamie R. Kuesel , Gilad Pivonia , Robert A. Shearer
IPC分类号： H04L9/00
CPC分类号： G06F21/72 , H04L9/06 , H04L63/123 , H04L2209/125
摘要： Methods and apparatus for reducing the impact of latency associated with decrypting encrypted data are provided. Rather than wait until an entire packet of encrypted data is validated (e.g., by checking for data transfer errors), the encrypted data may be pipelined to a decryption engine as it is received, thus allowing decryption to begin prior to validation. In some cases, the decryption engine may be notified of data transfer errors detected during the validation process, in order to prevent reporting false security violations.
摘要翻译：提供了减少与解密加密数据相关的延迟的影响的方法和装置。而不是等到整个加密数据包被验证（例如，通过检查数据传输错误），加密的数据可以在被接收时被流水线化到解密引擎，从而允许在验证之前开始解密。在一些情况下，可以向解密引擎通知在验证过程期间检测到的数据传输错误，以防止报告错误的安全违规。

4. 发明授权

US08069353B2 Low-latency data decryption interface 有权
标题翻译：低延迟数据解密界面
公开(公告)号：US08069353B2
公开(公告)日：2011-11-29
申请号：US12142007
申请日：2008-06-19
申请人： Bruce L. Beukema , Robert A. Drehmel , William E. Hall , Jamie R. Kuesel , Gilad Pivonia , Robert A. Shearer
发明人： Bruce L. Beukema , Robert A. Drehmel , William E. Hall , Jamie R. Kuesel , Gilad Pivonia , Robert A. Shearer
IPC分类号： H04L9/32
CPC分类号： G06F21/72 , H04L9/06 , H04L63/123 , H04L2209/125
摘要： Methods and apparatus for reducing the impact of latency associated with decrypting encrypted data are provided. Rather than wait until an entire packet of encrypted data is validated (e.g., by checking for data transfer errors), the encrypted data may be pipelined to a decryption engine as it is received, thus allowing decryption to begin prior to validation. In some cases, the decryption engine may be notified of data transfer errors detected during the validation process, in order to prevent reporting false security violations.
摘要翻译：提供了减少与解密加密数据相关的延迟的影响的方法和装置。而不是等到整个加密数据包被验证（例如，通过检查数据传输错误），加密的数据可以在被接收时被流水线化到解密引擎，从而允许在验证之前开始解密。在一些情况下，可以向解密引擎通知在验证过程期间检测到的数据传输错误，以防止报告错误的安全违规。

5. 发明授权

US07409558B2 Low-latency data decryption interface 有权
标题翻译：低延迟数据解密界面
公开(公告)号：US07409558B2
公开(公告)日：2008-08-05
申请号：US10932727
申请日：2004-09-02
申请人： Bruce L. Beukema , Robert A. Drehmel , William E. Hall , Jamie R. Kuesel , Gilad Pivonia , Robert A. Shearer
发明人： Bruce L. Beukema , Robert A. Drehmel , William E. Hall , Jamie R. Kuesel , Gilad Pivonia , Robert A. Shearer
IPC分类号： H04L9/00
CPC分类号： G06F21/72 , H04L9/06 , H04L63/123 , H04L2209/125
摘要： Methods and apparatus for reducing the impact of latency associated with decrypting encrypted data are provided. Rather than wait until an entire packet of encrypted data is validated (e.g., by checking for data transfer errors), the encrypted data may be pipelined to a decryption engine as it is received, thus allowing decryption to begin prior to validation. In some cases, the decryption engine may be notified of data transfer errors detected during the validation process, in order to prevent reporting false security violations.
摘要翻译：提供了减少与解密加密数据相关的延迟的影响的方法和装置。而不是等到整个加密数据包被验证（例如，通过检查数据传输错误），加密的数据可以在被接收时被流水线化到解密引擎，从而允许在验证之前开始解密。在一些情况下，可以向解密引擎通知在验证过程期间检测到的数据传输错误，以防止报告错误的安全违规。

6. 发明授权

US5117384A Method and apparatus for exponent adder 失效
标题翻译：指数加法器的方法和装置
公开(公告)号：US5117384A
公开(公告)日：1992-05-26
申请号：US702341
申请日：1991-04-03
申请人： Robert A. Drehmel , Scott A. Hilker
发明人： Robert A. Drehmel , Scott A. Hilker
IPC分类号： G06F7/485 , G06F7/50
CPC分类号： G06F7/485
摘要： An apparatus and method for determining the difference between two exponents of two floating point numbers is disclosed. The exponent of each number is split into two portions. A high portion contains the most significant bits and a low portion contains the least significant bits. The number of bits in the low portion is related to the number of bits in the fraction portion of each floating point number. To determine differences that require a shift in one of the exponenets, one of the differences between the low portions of the exponents is selected based upon which of several conditions are found with respect to the difference between the high portion. Advantageously, a set of adders which are as wide as the number of bits in the low portion of each exponent are used.
摘要翻译：公开了一种用于确定两个浮点数的两个指数之间的差异的装置和方法。每个数字的指数分为两部分。高部分包含最高有效位，而低部分包含最低有效位。低部分中的比特数与每个浮点数的分数部分中的比特数有关。为了确定需要在其中一个指数中移位的差异，基于相对于高部分之间的差异找到几个条件中的哪一个来选择指数的低部分之间的差异之一。有利地，使用与每个指数的低部分中的位数一样宽的一组加法器。

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