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    • 1. 发明授权
    • High voltage multipurpose input/output circuit
    • 高压多用途输入/输出电路
    • US06407581B1
    • 2002-06-18
    • US09817215
    • 2001-03-27
    • Richard HullEric Schroeder
    • Richard HullEric Schroeder
    • H03K190175
    • H03K19/1732H03K19/00315
    • A multipurpose input/output circuit providing full input output current drive capability and special mode selection on a single device pin. The circuit includes first and second high voltage detectors coupled to the pin, at least one pin bias circuit, and a mode selector. The mode selector determines whether the pin operates as either an input or output. One of the high voltage detectors detects a high voltage on the pin and causes the bias circuit to disconnect the pin from the supply voltage. The other high voltage detector operates to detect a special mode voltage on the pin and set the device into a special mode.
    • 多功能输入/输出电路,在单个器件引脚上提供全输入输出电流驱动能力和特殊模式选择。 电路包括耦合到引脚,至少一个引脚偏置电路和模式选择器的第一和第二高电压检测器。 模式选择器确定引脚是作为输入还是输出。 一个高电压检测器检测到引脚上的高电压,并使偏置电路将引脚与电源电压断开。 另一个高电压检测器用于检测引脚上的特殊模式电压,并将器件设置为特殊模式。
    • 4. 发明授权
    • Overcharge/discharge voltage regulator for EPROM memory array
    • 用于EPROM存储器阵列的过充/放电稳压器
    • US5703809A
    • 1997-12-30
    • US723926
    • 1996-10-01
    • Richard HullRandy L. Yach
    • Richard HullRandy L. Yach
    • G11C16/06G11C16/26G11C16/00
    • G11C16/26
    • A method of high speed reading of data from an EPROM, in which a memory array is programmed based on device status at intersections of rows and columns of the array to store data therein as 0's and 1's, uses a capacitive overcharging and discharging technique to enable fast voltage stabilization without drawing significant current. A row containing the memory element to be read is quickly overdriven to overcharge an effective capacitance associated with the row to substantially the maximum level of the EPROM supply voltage which may exceed the programmed threshold voltage of the selected memory element. The effective capacitance is thereupon discharged to a predetermined voltage level below both the maximum level of the supply voltage and the programmed threshold. Then the status and data content of the selected memory element are read by first grounding an electrode of a source-drain path of a transistor comprising the memory element to cause current with substantially no DC component to flow through that path of the transistor. A sense amplifier in the source-drain path of the transistor is triggered to detect current flow therethrough as indicative of the data content of the memory element.
    • 一种从EPROM高速读取数据的方法,其中存储器阵列基于阵列的行和列的交叉点处的设备状态来编程,以将其中的数据存储为0和1,使用电容性过充电和放电技术来实现 快速稳定电压,无需大量电流。 包含要读取的存储器元件的行被快速过驱动,以将与行相关联的有效电容过充电到基本上可能超过所选存储器元件的编程阈值电压的EPROM电源电压的最大电平。 然后,有效电容放电到低于电源电压的最大电平和编程阈值的预定电压电平。 然后,通过首先将包括存储元件的晶体管的源极 - 漏极路径的电极接地,以使基本上没有直流分量的电流流过晶体管的该路径来读取所选存储元件的状态和数据内容。 触发晶体管的源极 - 漏极路径中的读出放大器以检测当前流经其存储元件的数据内容的流量。
    • 10. 发明授权
    • Microcontroller having an n-bit data bus width with less than n I/O pins
    • 具有小于n个I / O引脚的n位数据总线宽度的微控制器
    • US5847450A
    • 1998-12-08
    • US644916
    • 1996-05-24
    • Scott FinkGregory C. BinghamRichard HullScott Ellison
    • Scott FinkGregory C. BinghamRichard HullScott Ellison
    • G06F13/40G06F15/78G11C5/06H01L23/02
    • G06F13/40G06F15/7832G06F15/7867G11C5/066
    • An Integrated Circuit (IC) package is disclosed comprising an IC chip with a microcontroller therein having an n-bit data bus, and up to n pins electrically coupled to the microcontroller. The IC package also includes a control register coupled to the microcontroller for receiving enable and disable signals from the microcontroller. One or more of the pins have one or more functional block associated thereto. Each functional block defines a specified function for its corresponding pin. Thus, each pin having a plurality of corresponding functional blocks has a number of potential functions equal to the number of corresponding functional blocks. The specific function for a given pin is selected by the enable signal from the control register which selects the appropriate functional block upon appropriate command from the microcontroller. BY using pins with multiple functions, the instant invention permits an n-bit architecture microcontroller to use less than or equal to n pins.
    • 公开了一种集成电路(IC)封装,其包括具有其中的微控制器的IC芯片,其具有n位数据总线,以及多达n个引脚,电耦合到微控制器。 IC封装还包括耦合到微控制器的控制寄存器,用于接收来自微控制器的使能和禁止信号。 一个或多个销具有与其相关联的一个或多个功能块。 每个功能块为其相应的引脚定义一个指定的功能。 因此,具有多个对应功能块的每个引脚具有等于相应功能块数量的多个潜在功能。 给定引脚的具体功能由来自控制寄存器的使能信号选择,该控制寄存器根据微控制器的适当命令选择适当的功能块。 通过使用具有多个功能的引脚,本发明允许n位架构微控制器使用小于或等于n个引脚。