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    • 4. 发明授权
    • Wireless flash memory card expansion system
    • 无线闪存卡扩展系统
    • US08176230B2
    • 2012-05-08
    • US11399975
    • 2006-04-07
    • Ben Wei ChenNgoc LeDavid Sun
    • Ben Wei ChenNgoc LeDavid Sun
    • G06F12/00G06F13/14
    • G06F13/385G06F3/0607G06F3/0632G06F3/0661G06F3/0679G06F2213/3814
    • A Flash memory card system is disclosed. The Flash memory card system comprises a Flash memory wireless host adapter and a Flash memory bus wireless device. The Flash memory wireless host adapter comprises a Flash memory card connector and a Flash memory controller coupled to the Flash memory card connector. The Flash-52 memory card signals are converted to standard Flash memory internal bus signals by the Flash memory controller. The host adapter further comprises a Flash memory wireless module coupled to the Flash memory controller for receiving and transmitting the standard Flash memory bus signals wirelessly. The Flash-51 memory bus wireless device comprises a Flash memory bus wireless device adapter coupled to a Flash memory. The device adapter is paired to the wireless module for receiving and transmitting the standard Flash memory bus signals wirelessly. A host device storage capacity utilizing the Flash memory card system is expanded.
    • 公开了一种闪存卡系统。 闪存卡系统包括闪存无线主机适配器和闪存总线无线设备。 闪存无线主机适配器包括闪存卡连接器和连接到闪存卡连接器的闪存控制器。 Flash-52存储卡信号由闪存控制器转换为标准闪存内部总线信号。 主机适配器还包括闪速存储器无线模块,其耦合到闪速存储器控制器,用于无线地接收和发送标准闪存总线信号。 Flash-51存储器总线无线设备包括耦合到闪存的闪存总线无线设备适配器。 设备适配器与无线模块配对,用于无线接收和发送标准闪存总线信号。 扩展了利用闪存卡系统的主机设备存储容量。
    • 6. 发明授权
    • Flash memory controller utilizing multiple voltages and a method of use
    • 使用多种电压的闪存控制器和使用方法
    • US07864615B2
    • 2011-01-04
    • US11067095
    • 2005-02-25
    • Ben Wei ChenDavid Hong-Dien ChenDavid Sun
    • Ben Wei ChenDavid Hong-Dien ChenDavid Sun
    • G11C5/14
    • G11C16/30G11C16/20
    • A Flash memory controller includes a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.
    • 闪存控制器包括主机接口,闪存接口,耦合在主机接口之间的控制器逻辑,处理多个电压的控制器逻辑。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点:(1)允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; (2)通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; (3)电源配置消除外部跳线选择; 和(4)闪存控制器电源接口引脚简化。
    • 8. 发明授权
    • Forensics tool for examination and recovery of computer data
    • 用于检查和恢复计算机数据的取证工具
    • US07640323B2
    • 2009-12-29
    • US11294562
    • 2005-12-06
    • David Sun
    • David Sun
    • G06F15/16
    • G06F21/6209
    • The present invention is directed to an electronic forensic tool for electronic discovery and computer forensics. The invention allows a user to conduct limited preliminary examination of computers using a client program on a physical memory device, whereby limited information about the examination result is displayed. To further access and examine the actual underlying data, the user must obtain additional functionality by obtaining a command block from a control server. The additional functionality will allow the client program to extract, copy, export, or further access the data of interest.
    • 本发明涉及一种用于电子发现和计算机取证的电子取证工具。 本发明允许用户使用物理存储设备上的客户端程序对计算机进行有限的初步检查,由此显示有关检查结果的有限信息。 为了进一步访问和检查实际的底层数据,用户必须通过从控制服务器获取命令块来获得附加功能。 附加功能将允许客户端程序提取,复制,导出或进一步访问感兴趣的数据。
    • 9. 发明申请
    • Push-button controlled correction tape
    • 按钮控制校正胶带
    • US20090159217A1
    • 2009-06-25
    • US12285201
    • 2008-09-30
    • David Sun
    • David Sun
    • B65H37/00
    • B65H37/007Y10T156/17Y10T156/1702Y10T156/1705Y10T156/1788Y10T156/1795Y10T156/18
    • The present invention relates to a push-button controlled correction tape, comprising: a casing, which is provided with an accommodating space, as well as an upper covering, a lower covering, and an assembling covering; a tape holder, which is placed in the accommodating space of the casing, and is provided with a first assembly, a second assembly, a tape exporting device, and an applicator head, wherein the first assembly is provided with a pair of poles; a pressing mechanism, which is placed on one side of the rear coving of the casing, and is provided with a pressing portion, a guiding block and a sliding bar. The pressing portion is provided with a receiving tube, which is used to receive the pole of the first assembly. The guiding block is provided with a first guiding path, and the sliding bar is provided with a guiding bar, by pushing the pressing portion, the guiding bar of the sliding bars would force the guiding bar to move to a preset position along the first guiding path due to the pushing from the guiding block. Furthermore, the receiving tube would push the poles of the tape holder, forcing the tape holder to move forwards, at this moment, the tape holder would experience a compression elastic force, so the applicator head would expose outside the circular opening of the casing.
    • 本发明涉及按钮控制的校正带,包括:设置有容纳空间的外壳,以及上盖,下盖和组装盖; 一个放置在壳体的容纳空间中的带固定器,并且设置有第一组件,第二组件,磁带导出装置和涂敷头,其中第一组件设置有一对磁极; 位于壳体的后槽的一侧的按压机构,设有按压部,引导块和滑动杆。 按压部分设置有用于接收第一组件的极的接收管。 引导块设置有第一引导路径,并且滑动杆设置有引导杆,通过推动按压部分,滑动杆的引导杆将迫使引导杆沿着第一引导件移动到预设位置 由于从引导块推动路径。 此外,接收管将推动带保持器的磁极,迫使磁带保持器向前移动,此时磁带架将经受压缩弹性力,因此涂敷头将露出外壳的圆形开口。
    • 10. 发明授权
    • Repairing Advanced-Memory Buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module
    • 使用冗余内存缓冲区修复高级内存缓冲区(AMB),以修复全缓冲内存模块上的DRAM
    • US07474576B2
    • 2009-01-06
    • US12053261
    • 2008-03-21
    • Ramon S. CoDavid Sun
    • Ramon S. CoDavid Sun
    • G11C29/00
    • G11C5/04G11C29/808G11C29/88
    • A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.
    • 修复全缓冲存储器模块可以具有存在诸如单位错误等缺陷的存储器芯片。 修复控制器被添加到内存模块的高级内存缓冲区(AMB)中。 AMB完全缓冲从主机通过南行车道作为串行数据包发送的内存请求。 AMB从串行数据包中提取存储器访问地址。 修复控制器将存储器访问地址与修复地址进行比较,并将从缺陷存储器芯片的访问转移到用于修复地址的备用存储器。 修复地址可以在测试存储器模块期间定位并编程到AMB上的修复地址缓冲区中。 修复地址可以首先编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电期间复制到AMB上的修复地址缓冲区。