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1. 发明申请

US20140247088A1 MINIMIZING POWER CONSUMPTION IN ASYNCHRONOUS DATAFLOW ARCHITECTURES 有权
标题翻译：最小化异步数据流架构中的功耗
公开(公告)号：US20140247088A1
公开(公告)日：2014-09-04
申请号：US13782631
申请日：2013-03-01
申请人： RAYTHEON COMPANY
发明人： Kenneth E. Prager , Lloyd J. Lewins , Harry Marr , Julia Karl , Michael Vahey
IPC分类号： H03K19/00
CPC分类号： H03K19/0008
摘要： A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable operating voltage for the one or more elements; control logic configured to receive feedback signals from each of the one or more elements, the feedback signals indicative of a rate at which data is moving through each individual element; and the control logic configured to output a control signal to the power supply so as to cause the power supply to reduce the operating voltage for the one or more elements responsive to a decreasing workload detected therein, and to cause the power supply to increase the operating voltage for the one or more pipelines responsive to an increasing workload detected therein.
摘要翻译：数字信号处理装置包括具有被配置为处理数字数据的一个或多个元件的数字电路装置; 电源，被配置为传递用于所述一个或多个元件的可控工作电压; 控制逻辑被配置为从所述一个或多个元件中的每一个接收反馈信号，所述反馈信号指示数据正在通过每个单独元件移动的速率; 以及所述控制逻辑被配置为将控制信号输出到所述电源，以便响应于在其中检测到的工作负荷减少而使所述电源降低所述一个或多个元件的工作电压，并且使所述电源增加所述操作响应于其中检测到的增加的工作负载，一个或多个管道的电压。

2. 发明授权

US08836372B1 Minimizing power consumption in asynchronous dataflow architectures 有权
标题翻译：最小化异步数据流架构中的功耗
公开(公告)号：US08836372B1
公开(公告)日：2014-09-16
申请号：US13782631
申请日：2013-03-01
申请人： Raytheon Company
发明人： Kenneth E. Prager , Lloyd J. Lewins , Harry Marr , Julia Karl , Michael Vahey
IPC分类号： H03K19/00
CPC分类号： H03K19/0008
摘要： A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable operating voltage for the one or more elements; control logic configured to receive feedback signals from each of the one or more elements, the feedback signals indicative of a rate at which data is moving through each individual element; and the control logic configured to output a control signal to the power supply so as to cause the power supply to reduce the operating voltage for the one or more elements responsive to a decreasing workload detected therein, and to cause the power supply to increase the operating voltage for the one or more pipelines responsive to an increasing workload detected therein.
摘要翻译：数字信号处理装置包括具有被配置为处理数字数据的一个或多个元件的数字电路装置; 电源，被配置为传递用于所述一个或多个元件的可控工作电压; 控制逻辑被配置为从所述一个或多个元件中的每一个接收反馈信号，所述反馈信号指示数据正在通过每个单独元件移动的速率; 以及所述控制逻辑被配置为将控制信号输出到所述电源，以便响应于在其中检测到的工作负荷减少而使所述电源降低所述一个或多个元件的工作电压，并且使所述电源增加所述操作响应于其中检测到的增加的工作负载，一个或多个管道的电压。

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