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    • 1. 发明授权
    • Method of adaptively selecting chips for reducing in-line testing in a semiconductor manufacturing line
    • 自适应选择芯片以减少半导体生产线中的在线测试的方法
    • US07682842B2
    • 2010-03-23
    • US12129712
    • 2008-05-30
    • Rao H. DesineniXu OuyangHargurpreet SinghYunsheng SongStephen Wu
    • Rao H. DesineniXu OuyangHargurpreet SinghYunsheng SongStephen Wu
    • H01L21/00
    • G01R31/2894
    • A method for identifying potentially defective integrated circuit chips and excluding them from future testing as wafers move through a manufacturing line The method includes data-collecting steps, tagging the chips on wafers identified as potentially bad chips based on information collected as the wafer moves down the fabrication line, evaluating test cost savings by eliminating any further tests on the tagged chips preferably using a test cost database. Considering all the future tests to be preformed, the tagged chips are skipped if it is determined that the test cost saving is significant. Tagging bad chips is based on various criteria and models which are dynamically adjusted by performing the wafer final test on samples of the tagged chips and feeding-back the final test results. The dynamic adaptive adjustment method preferably includes a feedback loop or iterative process to evaluate financial tradeoffs when assessing the profit of salvaging chips against the additional test costs.
    • 一种用于识别潜在有缺陷的集成电路芯片的方法,并将其从将来的测试中排除,因为晶片移动通过生产线。该方法包括数据收集步骤,基于当晶片向下移动时收集的信息将标记为潜在的坏芯片的晶片上的芯片标记 通过消除对标记芯片的任何进一步测试,优选使用测试成本数据库来评估测试成本节省。 考虑到将要执行的所有将来的测试,如果确定测试成本节省是重要的,则标记的芯片被跳过。 标记坏芯片是基于各种标准和模型,通过对标记芯片的样品进行晶圆最终测试并反馈最终测试结果来动态调整。 动态自适应调整方法优选地包括反馈循环或迭代过程,以在评估补救筹码的利润与额外的测试成本时评估金融权衡。