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1. 发明授权

US07269711B2 Methods and apparatus for address generation in processors 有权
标题翻译：处理器中地址生成的方法和设备
公开(公告)号：US07269711B2
公开(公告)日：2007-09-11
申请号：US10747764
申请日：2003-12-29
申请人： Rajesh B. Patel , Robert L. Farrell , James E. Phillips , Belliappa Kuttanna , Scott E. Siers , T. W. Griffith
发明人： Rajesh B. Patel , Robert L. Farrell , James E. Phillips , Belliappa Kuttanna , Scott E. Siers , T. W. Griffith
IPC分类号： G06F12/00
CPC分类号： G06F9/342 , G06F9/355 , G06F9/3842 , G06F9/3861
摘要： Methods and apparatus to generate addresses in processors are disclosed. An example address generator disclosed herein includes an adder to add a first address component and a second address component to generate an address, a correction indicator to indicate if the address is correct, and a control input to modify an operation of the adder.
摘要翻译：公开了在处理器中产生地址的方法和装置。本文公开的示例性地址生成器包括：加法器，用于添加第一地址分量和第二地址分量以产生地址;校正指示符，用于指示地址是否正确;以及控制输入，用于修改加法器的操作。

2. 发明申请

US20110157195A1 Sharing resources between a CPU and GPU 有权
标题翻译：在CPU和GPU之间共享资源
公开(公告)号：US20110157195A1
公开(公告)日：2011-06-30
申请号：US12655577
申请日：2009-12-31
申请人： Eric Sprangle , Matthew Craighead , Chris Goodman , Belliappa Kuttanna
发明人： Eric Sprangle , Matthew Craighead , Chris Goodman , Belliappa Kuttanna
IPC分类号： G06T15/00
CPC分类号： G06T1/20
摘要： A technique to share execution resources. In one embodiment, a CPU and a GPU share resources according to workload, power considerations, or available resources by scheduling or transferring instructions and information between the CPU and GPU.
摘要翻译：一种共享执行资源的技术。在一个实施例中，CPU和GPU根据工作负载，功率注意事项或可用资源通过在CPU和GPU之间调度或传送指令和信息来共享资源。

3. 发明授权

US06484240B1 Mechanism for reordering transactions in computer systems with snoop-based cache consistency protocols 有权
标题翻译：使用基于snoop的缓存一致性协议重新排序计算机系统中的事务的机制
公开(公告)号：US06484240B1
公开(公告)日：2002-11-19
申请号：US09365159
申请日：1999-07-30
申请人： Robert Cypher , Ricky C. Hetherington , Belliappa Kuttanna
发明人： Robert Cypher , Ricky C. Hetherington , Belliappa Kuttanna
IPC分类号： G06F1200
CPC分类号： G06F12/0831
摘要： An apparatus and method for expediting the processing of requests in a multiprocessor shared memory system. In a multiprocessor shared memory system, requests can be processed in any order provided two rules are followed. First, no request that grants access rights to a processor can be processed before an older request that revokes access rights from the processor. Second, all requests that reference the same cache line are processed in the order in which they arrive. In this manner, requests can be processed out-of-order to allow cache-to-cache transfers to be accelerated. In particular, foreign requests that require a processor to provide data can be processed by that processor before older local requests that are awaiting data. In addition, newer local requests can be processed before older local requests. As a result, the apparatus and method described herein may advantageously increase performance in multiprocessor shared memory systems by reducing latencies associated with a cache consistency protocol.
摘要翻译：一种用于加速处理多处理器共享存储器系统中的请求的装置和方法。在多处理器共享存储器系统中，可以按照遵循的两个规则的任何顺序处理请求。首先，在从处理器撤销访问权限的较旧请求之前，不能处理授予处理器访问权限的请求。其次，引用同一个高速缓存行的所有请求按照它们到达的顺序进行处理。以这种方式，请求可以被无序地处理，以允许缓存到缓存传输被加速。特别地，要求处理器提供数据的外部请求可以在等待数据的较早的本地请求之前被该处理器处理。此外，较旧的本地请求可以在较旧的本地请求之前处理。结果，本文描述的装置和方法可以有利地通过减少与高速缓存一致性协议相关联的延迟来增加多处理器共享存储器系统中的性能。

4. 发明授权

US08289850B2 Interconnect bandwidth throttler 有权
标题翻译：互连带宽调节器
公开(公告)号：US08289850B2
公开(公告)日：2012-10-16
申请号：US13241738
申请日：2011-09-23
申请人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
发明人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
IPC分类号： H04L12/28 , H04J1/16 , G08C15/00 , G06F11/00 , G01R31/08
CPC分类号： G06F1/3287 , G06F1/3203 , G06F1/3243 , G06F13/42 , G06F15/17306 , Y02D10/151 , Y02D10/152 , Y02D10/171
摘要： An interconnect bandwidth throttler is disclosed. The interconnect bandwidth throttler turns off the interconnect, based on whether a maximum number of transactions has taken place within a predetermined throttle window. Both the maximum number of transactions and the throttle window are adjustable. Characteristics such as performance, thermal considerations, and average power are adjustable using the interconnect bandwidth throttler.
摘要翻译：公开了一种互连带宽调节器。基于在预定的节气门窗口内是否发生了最大数量的交易，互连带宽调节器关闭互连。最大交易数量和油门窗口均可调。使用互连带宽调节器可以调整性能，散热和平均功耗等特性。

5. 发明授权

US6029006A Data processor with circuit for regulating instruction throughput while powered and method of operation 失效
标题翻译：带电路的数据处理器，用于调节电源时的指令吞吐量和操作方法
公开(公告)号：US6029006A
公开(公告)日：2000-02-22
申请号：US772713
申请日：1996-12-23
申请人： Michael Alexander , Belliappa Kuttanna
发明人： Michael Alexander , Belliappa Kuttanna
IPC分类号： G06F1/04 , G06F1/20 , G06F1/32 , G06F9/30 , G06F9/38 , G06F15/78
CPC分类号： G06F9/3869 , G06F1/32 , G06F9/3802 , G06F9/3836 , G06F9/384
摘要： A data processor (10) incorporates instruction regulating or "throttling" circuitry (31) for limiting consumed power. A user visible register maintains an INTERVAL field by which instruction fetch from an instruction cache (14) is periodically delayed. This INTERVAL field may be adjusted to suit the power budget of the data processor.
摘要翻译：数据处理器（10）包含用于限制消耗功率的指令调节或“限流”电路（31）。用户可见寄存器保持INTERVAL字段，通过该INTERVAL字段周期性地延迟来自指令高速缓存（14）的指令获取。可以调整该INTERVAL字段以适应数据处理器的功率预算。

6. 发明申请

US20120054387A1 INTERCONNECT BANDWIDTH THROTTLER 有权
标题翻译：互连带宽THROTTLER
公开(公告)号：US20120054387A1
公开(公告)日：2012-03-01
申请号：US13241738
申请日：2011-09-23
申请人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
发明人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
IPC分类号： G06F13/42
CPC分类号： G06F1/3287 , G06F1/3203 , G06F1/3243 , G06F13/42 , G06F15/17306 , Y02D10/151 , Y02D10/152 , Y02D10/171
摘要： An interconnect bandwidth throttler is disclosed. The interconnect bandwidth throttler turns off the interconnect, based on whether a maximum number of transactions has taken place within a predetermined throttle window. Both the maximum number of transactions and the throttle window are adjustable. Characteristics such as performance, thermal considerations, and average power are adjustable using the interconnect bandwidth throttler.
摘要翻译：公开了一种互连带宽调节器。基于在预定的节气门窗口内是否发生了最大数量的交易，互连带宽调节器关闭互连。最大交易数量和油门窗口均可调。使用互连带宽调节器可以调整性能，散热和平均功耗等特性。

7. 发明申请

US20090248927A1 INTERCONNECT BANDWIDTH THROTTLER 有权
标题翻译：互连带宽THROTTLER
公开(公告)号：US20090248927A1
公开(公告)日：2009-10-01
申请号：US12060157
申请日：2008-03-31
申请人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
发明人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
IPC分类号： G06F13/42
CPC分类号： G06F1/3287 , G06F1/3203 , G06F1/3243 , G06F13/42 , G06F15/17306 , Y02D10/151 , Y02D10/152 , Y02D10/171
摘要： An interconnect bandwidth throttler is disclosed. The interconnect bandwidth throttler turns off the interconnect, based on whether a maximum number of transactions has take place within a predetermined throttle window. Both the maximum number of transactions and the throttle window are adjustable.
摘要翻译：公开了一种互连带宽调节器。基于在预定的节气门窗口内是否发生最大数量的交易，互连带宽调节器关闭互连。最大交易数量和油门窗口均可调。

8. 发明申请

US20050228971A1 Buffer virtualization 审中-公开
标题翻译：缓冲区虚拟化
公开(公告)号：US20050228971A1
公开(公告)日：2005-10-13
申请号：US10821309
申请日：2004-04-08
申请人： Nicholas Samra , Belliappa Kuttanna , Rajesh Patel
发明人： Nicholas Samra , Belliappa Kuttanna , Rajesh Patel
IPC分类号： G06F9/26 , G06F9/50
CPC分类号： G06F9/5016
摘要： A buffer virtualization mechanism to allow for a large number of allocate-able buffering resources. In particular, embodiments of the invention involve a tracking technique for implementing the use of virtual buffers within a microprocessor architecture.
摘要翻译：缓冲区虚拟化机制，允许大量可分配的缓冲资源。特别地，本发明的实施例涉及用于在微处理器架构内实现虚拟缓冲器的使用的跟踪技术。

9. 发明申请

US20050071563A1 Early data return indication mechanism 失效
标题翻译：早期数据返回指示机制
公开(公告)号：US20050071563A1
公开(公告)日：2005-03-31
申请号：US10676446
申请日：2003-09-30
申请人： Belliappa Kuttanna , Robert Milstrey , Stanley Domen , Glenn Hinton
发明人： Belliappa Kuttanna , Robert Milstrey , Stanley Domen , Glenn Hinton
IPC分类号： G06F12/00
CPC分类号： G06F9/383 , G06F12/0859
摘要： A method, apparatus, and system are provided for early data return indication mechanism. According to one embodiment, data cache is accessed for data in response to a request for the data, the request received from an instruction source, and the request waits for the data to be retrieved from memory if the data is not located in the data cache, and an early data ready indication is received at a resource scheduler, the early data ready indication being received prior to receiving a data ready indication referring to the data being ready to be retrieved from the memory.
摘要翻译：提供了早期数据返回指示机制的方法，装置和系统。根据一个实施例，响应于对数据的请求，从指令源接收到的请求，数据高速缓存被访问，并且如果数据不位于数据高速缓存中，则请求等待从存储器检索数据并且在资源调度器处接收到早期数据就绪指示，在接收到准备好从存储器检索的数据的数据就绪指示之前接收到早期数据就绪指示。

10. 发明授权

US08050177B2 Interconnect bandwidth throttler 有权
标题翻译：互连带宽调节器
公开(公告)号：US08050177B2
公开(公告)日：2011-11-01
申请号：US12060157
申请日：2008-03-31
申请人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
发明人： Lance Hacking , Ramana Rachakonda , Belliappa Kuttanna , Rajesh Patel
IPC分类号： G01R31/08 , G06F11/00 , G08C15/00
CPC分类号： G06F1/3287 , G06F1/3203 , G06F1/3243 , G06F13/42 , G06F15/17306 , Y02D10/151 , Y02D10/152 , Y02D10/171
摘要： An interconnect bandwidth throttler is disclosed. The interconnect bandwidth throttler turns off the interconnect, based on whether a maximum number of transactions has take place within a predetermined throttle window. Both the maximum number of transactions and the throttle window are adjustable.
摘要翻译：公开了一种互连带宽调节器。基于在预定的节气门窗口内是否发生最大数量的交易，互连带宽调节器关闭互连。最大交易数量和油门窗口均可调。

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