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1. 发明申请

US20130328060A1 LAYOUT DESIGN FOR A HIGH POWER, GaN-BASED FET 有权
公开(公告)号：US20130328060A1
公开(公告)日：2013-12-12
申请号：US13965871
申请日：2013-08-13
申请人： POWER INTEGRATIONS, INC.
发明人： LinLin Liu , Milan Pophristic , Boris Peres
IPC分类号： H01L29/778
CPC分类号： H01L29/7786 , H01L29/0657 , H01L29/2003 , H01L29/41758 , H01L29/42316
摘要： A FET includes a first and second set of finger arrays that each include a source, gate and drain. A first source pad is electrically coupled to source electrodes in the first set of finger arrays. A second source pad is electrically coupled to the source electrodes in the second set of finger arrays. A common drain pad is electrically coupled to drain electrodes in the first and second set of finger arrays. A first gate pad is electrically coupled to gate electrodes in the first set of finger arrays. A second gate pad is electrically coupled to gate electrodes in the second set of finger arrays. A substrate is also provided on which are disposed the first and second set of finger arrays, the first and second source pads, the common drain pad, and the first and second gate pads.

2. 发明申请

US20130043487A1 LAYOUT DESIGN FOR A HIGH POWER, GaN-BASED FET 有权
标题翻译：用于高功率GaN基FET的布局设计
公开(公告)号：US20130043487A1
公开(公告)日：2013-02-21
申请号：US13655979
申请日：2012-10-19
申请人： POWER INTEGRATIONS, INC.
发明人： LinLin Liu , Milan Pophristic , Boris Peres
IPC分类号： H01L29/808 , H01L29/201
CPC分类号： H01L29/7786 , H01L29/0657 , H01L29/2003 , H01L29/41758 , H01L29/42316
摘要： A FET includes a first and second set of finger arrays that each include a source, gate and drain. A first source pad is electrically coupled to source electrodes in the first set of finger arrays. A second source pad is electrically coupled to the source electrodes in the second set of finger arrays. A common drain pad is electrically coupled to drain electrodes in the first and second set of finger arrays. A first gate pad is electrically coupled to gate electrodes in the first set of finger arrays. A second gate pad is electrically coupled to gate electrodes in the second set of finger arrays. A substrate is also provided on which are disposed the first and second set of finger arrays, the first and second source pads, the common drain pad, and the first and second gate pads.
摘要翻译： FET包括第一组和第二组手指阵列，每组包括源极，栅极和漏极。第一源极焊盘电耦合到第一组指状阵列中的源电极。第二源极焊盘电耦合到第二组指状阵列中的源电极。公共漏极焊盘电耦合到第一组和第二组指状阵列中的漏电极。第一栅极焊盘电耦合到第一组指状阵列中的栅电极。第二栅极焊盘电耦合到第二组指状阵列中的栅电极。还设置有基板，第一组和第二组指状物阵列，第一和第二源极焊盘，公共漏极焊盘以及第一和第二栅极焊盘。

3. 发明授权

US08530903B2 Layout design for a high power, GaN-based FET having interdigitated electrodes 有权
标题翻译：具有交叉电极的大功率GaN基FET的布局设计
公开(公告)号：US08530903B2
公开(公告)日：2013-09-10
申请号：US13655979
申请日：2012-10-19
申请人： Power Integrations, Inc.
发明人： LinLin Liu , Milan Pophristic , Boris Peres
IPC分类号： H01L31/0256
CPC分类号： H01L29/7786 , H01L29/0657 , H01L29/2003 , H01L29/41758 , H01L29/42316
摘要： A FET includes a first and second set of finger arrays that each include a source, gate and drain. A first source pad is electrically coupled to source electrodes in the first set of finger arrays. A second source pad is electrically coupled to the source electrodes in the second set of finger arrays. A common drain pad is electrically coupled to drain electrodes in the first and second set of finger arrays. A first gate pad is electrically coupled to gate electrodes in the first set of finger arrays. A second gate pad is electrically coupled to gate electrodes in the second set of finger arrays. A substrate is also provided on which are disposed the first and second set of finger arrays, the first and second source pads, the common drain pad, and the first and second gate pads.
摘要翻译： FET包括第一组和第二组手指阵列，每组包括源极，栅极和漏极。第一源极焊盘电耦合到第一组指状阵列中的源电极。第二源极焊盘电耦合到第二组指状阵列中的源电极。公共漏极焊盘电耦合到第一组和第二组指状阵列中的漏电极。第一栅极焊盘电耦合到第一组指状阵列中的栅电极。第二栅极焊盘电耦合到第二组指状阵列中的栅电极。还设置有基板，第一组和第二组指状物阵列，第一和第二源极焊盘，公共漏极焊盘以及第一和第二栅极焊盘。

4. 发明授权

US08729565B2 Layout design for a high power, GaN-based FET having interdigitated gate, source and drain electrodes 有权
标题翻译：具有交错栅极，源极和漏极的高功率GaN基FET的布局设计
公开(公告)号：US08729565B2
公开(公告)日：2014-05-20
申请号：US13965871
申请日：2013-08-13
申请人： Power Integrations, Inc.
发明人： LinLin Liu , Milan Pophristic , Boris Peres
IPC分类号： H01L31/0256
CPC分类号： H01L29/7786 , H01L29/0657 , H01L29/2003 , H01L29/41758 , H01L29/42316
摘要： A FET includes a first and second set of finger arrays that each include a source, gate and drain. A first source pad is electrically coupled to source electrodes in the first set of finger arrays. A second source pad is electrically coupled to the source electrodes in the second set of finger arrays. A common drain pad is electrically coupled to drain electrodes in the first and second set of finger arrays. A first gate pad is electrically coupled to gate electrodes in the first set of finger arrays. A second gate pad is electrically coupled to gate electrodes in the second set of finger arrays. A substrate is also provided on which are disposed the first and second set of finger arrays, the first and second source pads, the common drain pad, and the first and second gate pads.
摘要翻译： FET包括第一组和第二组手指阵列，每组包括源极，栅极和漏极。第一源极焊盘电耦合到第一组指状阵列中的源电极。第二源极焊盘电耦合到第二组指状阵列中的源电极。公共漏极焊盘电耦合到第一组和第二组指状阵列中的漏电极。第一栅极焊盘电耦合到第一组指状阵列中的栅电极。第二栅极焊盘电耦合到第二组指状阵列中的栅电极。还设置有基板，第一组和第二组手指阵列，第一和第二源极焊盘，公共漏极焊盘以及第一和第二栅极焊盘。

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