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1. 发明授权

US08650464B1 Symmetric diagonal interleaving and encoding/decoding circuit and method 有权
标题翻译：对称交错和编码/解码电路及方法
公开(公告)号：US08650464B1
公开(公告)日：2014-02-11
申请号：US13225337
申请日：2011-09-02
申请人： Po Tong , Ivana Djurdjevic , Damien Latremouille , Francesco Caggioni , Dariush Dabiri
发明人： Po Tong , Ivana Djurdjevic , Damien Latremouille , Francesco Caggioni , Dariush Dabiri
IPC分类号： H03M13/00
CPC分类号： H03M13/2927 , H03M13/2721 , H03M13/2921
摘要： A circuit and method form a codeword including parity and message bits, as follows. Each codeword has a first part in a current sequence (e.g. a current OTN-row) that is to be now transmitted and second part spread across multiple past sequences (e.g. previously prepared and transmitted OTN-rows). The codewords are grouped into multiple groups such that each codeword within a group has no bit in common with another codeword in that group. Moreover, each codeword has a bit in common with a different codeword in a different group.
摘要翻译：电路和方法形成包括奇偶校验和消息位的码字，如下。每个码字具有当前序列（例如，当前OTN行）中的第一部分，其将被发送，并且第二部分在多个过去序列（例如，预先准备和发送的OTN行）之间扩展。码字被分组成多个组，使得组内的每个码字不具有与该组中的另一个码字相同的位。此外，每个码字具有与不同组中的不同码字相同的位。

2. 发明授权

US5285455A Serial data encoder 失效
标题翻译：串行数据编码器
公开(公告)号：US5285455A
公开(公告)日：1994-02-08
申请号：US76271
申请日：1993-06-11
申请人： Po Tong , Peter A. Ruetz
发明人： Po Tong , Peter A. Ruetz
IPC分类号： H03M13/15 , G06F11/00
CPC分类号： H03M13/15
摘要： Sequential encoding of Reed-Solomon codes using a discrete time delay line, a single adder, and a single multiplier provides efficient encoding of Reed-Solomon codes with or without interleaving. The encoder utilizes a clock whose rate is r times the symbol rate where r is the redundancy of the code. The finite field operations are performed in a sequential manner requiring only one finite field multiplier and one finite field adder. All memory elements are consolidated into a discrete time delay line which can be implemented with a random access memory. The encoder can be easily reconfigured for changes in generator polynomial of the code, the amount of redundancy, and interleaving depth.
摘要翻译：使用离散时间延迟线，单个加法器和单个乘法器对里德 - 所罗门码进行连续编码，可提供有或没有交错的Reed-Solomon码的有效编码。编码器利用速率是符号速率r倍的时钟，其中r是代码的冗余度。有限场操作以仅需要一个有限域乘法器和一个有限域加法器的顺序方式执行。所有存储器元件被合并成离散时间延迟线，其可以用随机存取存储器实现。编码器可以轻松地重新配置用于代码的生成多项式，冗余量和交织深度的变化。

3. 发明授权

US5181031A Method and apparatus for decoding huffman codes by detecting a special class 失效
标题翻译：通过检测特殊类来对哈夫曼码进行解码的方法和装置
公开(公告)号：US5181031A
公开(公告)日：1993-01-19
申请号：US737620
申请日：1991-07-30
申请人： Po Tong , Peter Ruetz
发明人： Po Tong , Peter Ruetz
IPC分类号： H03M7/42
CPC分类号： H03M7/425
摘要： A structure and a method are provided for fast-decoding a Huffman code using a leading 1's detector for recognizing the number of leading 1's in the Huffman codeword up to a predetermined maximum, so as to provide a class number in accordance with the number of leading 1's recognized, a first logic circuit for providing a "remainder" by removing from the Huffman codeword a number of bits in accordance with the class number, and a second logic circuit for recognizing a special class. In one embodiment, decoding is accomplished by accessing a storage device using an address formed by a table number, a subclass number derived from the class number and all of the bits in the remainder except the least significant bit.
摘要翻译：提供了一种结构和方法，用于使用领先的1检测器快速解码霍夫曼码，以便识别霍夫曼码字中的前导1的数量直到预定的最大值，以便根据前导码的数量提供类号 1，识别出第一逻辑电路，用于通过根据类号从霍夫曼码字中删除多个比特来提供“余数”，以及用于识别特殊类的第二逻辑电路。在一个实施例中，通过使用由表号形成的地址，从类号导出的子类号和除最低有效位之外的余数中的所有位访问存储设备来完成解码。

4. 发明授权

US08015475B2 Erasure decoding for receivers 有权
标题翻译：对接收机进行擦除解码
公开(公告)号：US08015475B2
公开(公告)日：2011-09-06
申请号：US11828726
申请日：2007-07-26
申请人： Jin Lu , Po Tong , Chia-Ning Peng
发明人： Jin Lu , Po Tong , Chia-Ning Peng
IPC分类号： H03M13/00
CPC分类号： H04L1/0057 , H03M13/1515 , H03M13/353 , H03M13/6533 , H04L1/0045 , H04L1/0067
摘要： A system comprising communication logic capable of receiving data signals from a network. The signals comprise both erasure error and random error. The system also comprises processing logic coupled to the communication logic and adapted to partition parity check bytes of the received signals into a first portion and a second portion. The processing logic uses the first portion for random error correction and the second portion for erasure error correction.
摘要翻译：一种包括能够从网络接收数据信号的通信逻辑的系统。信号包括擦除误差和随机误差。该系统还包括耦合到通信逻辑的处理逻辑，并且适于将接收到的信号的奇偶校验字节分成第一部分和第二部分。处理逻辑使用第一部分进行随机纠错，第二部分用于擦除误差校正。

5. 发明授权

US5596604A Multicarrier modulation transmission system with variable delay 失效
标题翻译：具有可变延迟的多载波调制传输系统
公开(公告)号：US5596604A
公开(公告)日：1997-01-21
申请号：US107200
申请日：1993-08-17
申请人： John M. Cioffi , Po Tong , James T. Aslanis , Antoinette H. Gooch
发明人： John M. Cioffi , Po Tong , James T. Aslanis , Antoinette H. Gooch
IPC分类号： H04L1/00 , H04L27/26 , H04K1/10
CPC分类号： H04L5/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L5/0007 , H04L5/0046 , H04L1/0057 , H04L1/006
摘要： A transmission system using multicarrier modulation applies FECC (forward error correcting code) coding and codeword interleaving differently to input signals from a plurality of different data channels to produce encoded data signals having different reliabilities and different coding delays. Bits of encoded data signals having relatively less delay are allocated to carriers that are subject to relatively more attenuation and/or channel noise, and hence that are allocated fewer bits for transmission in each symbol period, to reduce the effects of impulse noise. The data channels can comprise video, data, and control channels transmitted on an ADSL (asymmetric digital subscriber line) two-wire telephone line.
摘要翻译：使用多载波调制的传输系统对来自多个不同数据信道的输入信号进行FECC（前向纠错码）编码和码字交织，以产生具有不同可靠性和不同编码延迟的编码数据信号。具有相对较小延迟的编码数据信号的位被分配给经受相对更多衰减和/或信道噪声的载波，并且因此在每个符号周期中被分配用于传输的较少位，以减少脉冲噪声的影响。数据信道可以包括在ADSL（非对称数字用户线路）双线电话线上发送的视频，数据和控制信道。

6. 发明授权

US5208593A Method and structure for decoding Huffman codes using leading ones detection 失效
标题翻译：使用领先检测对霍夫曼码进行解码的方法和结构
公开(公告)号：US5208593A
公开(公告)日：1993-05-04
申请号：US905257
申请日：1992-06-26
申请人： Po Tong , Peter A. Ruetz
发明人： Po Tong , Peter A. Ruetz
IPC分类号： H03M7/42
CPC分类号： H03M7/425
摘要： A method and a structure are provided for decoding Huffman codes using a random access memory having a size less than twice the total number of codewords decodable. Under this method, the number of leading 1's in a Huffman codeword and the bits of the Huftman code word other than the leading 1's ("remainder") are combined to form an address into the random access memory. Using the fact that, for a given number of leading 1's in a Huffman code, the possible remainder of the Huffman code is no longer than a predetermined number of bits, the size of the random access memory necessary for decoding such Huffman codes can be made optimally small.
摘要翻译：提供了一种方法和结构，用于使用尺寸小于可解码的码字总数的两倍的随机存取存储器对霍夫曼码进行解码。在这种方法下，组合霍夫曼码字中的前导1的数量和除了前导1（“余数”）之外的霍夫特曼码字的比特，以形成随机存取存储器中的地址。使用以下事实：对于霍夫曼代码中的给定数量的前导1，霍夫曼码的可能余数不超过预定数量的比特，可以进行解码这种霍夫曼码所需的随机存取存储器的大小最佳小

7. 发明授权

US5680394A Time division duplexed high speed data transmission system and method 失效
标题翻译：时分双工高速数据传输系统及方法
公开(公告)号：US5680394A
公开(公告)日：1997-10-21
申请号：US501250
申请日：1995-07-11
申请人： John A. C. Bingham , Po Tong
发明人： John A. C. Bingham , Po Tong
IPC分类号： H04L5/16 , H04J11/00 , H04L5/02 , H04L5/14 , H04L25/49 , H04J3/06
CPC分类号： H04L5/1484 , H04L25/4921 , H04L5/023
摘要： A method of coordinating very high speed bi-directional data transmissions between a central unit and a plurality of remote units over distinct twisted pair transmission lines that share a binder is described. Specifically, periodic synchronized upstream and downstream communication periods are provided that do not overlap with one another. The upstream and downstream communication periods for all of the wires that share a binder are synchronized. With this arrangement, all of the very high speed transmissions within the same binder are synchronized and time division duplexed such that downstream communications are not transmitted at times that overlap with the transmission of upstream communications. In some embodiments, quiet periods are provided to separate the upstream and downstream communication periods. The described invention may be used in conjunction with a wide variety of modulation schemes, including both multi-carrier and single carrier transmission schemes. It is backwards compatible with existing systems and has particular advantages in very high performance systems.
摘要翻译：描述了一种通过共享粘合剂的不同双绞线传输线在中央单元和多个远程单元之间协调非常高速度的双向数据传输的方法。具体地，提供不彼此重叠的周期性同步的上游和下游通信周期。共享粘合剂的所有电线的上下游通信周期是同步的。通过这种安排，同一装载机内的所有非常高速的传输是同步的，并且进行时分双工，使得下游通信在与上行通信的传输重叠的时间不传输。在一些实施例中，提供安静周期以分离上游和下游通信周期。所描述的发明可以结合多种调制方案使用，包括多载波和单载波传输方案。它与现有系统向后兼容，并且在非常高性能的系统中具有特殊的优势。

8. 发明授权

US4843607A Multiple error trapping 失效
标题翻译：多重错误捕获
公开(公告)号：US4843607A
公开(公告)日：1989-06-27
申请号：US134137
申请日：1987-12-17
申请人： Po Tong
发明人： Po Tong
IPC分类号： H03M13/03 , H03M13/17
CPC分类号： H03M13/033 , H03M13/17
摘要： By translating in accordance with a predetermined permutation the virtual check locations of a virtual message re-encoder, plural erroneous symbols (up to a certain limit) occurring in any pattern in a received codeword may be trapped simultaneously in virtual check locations. By simply adding to them the corresponding virtual check symbols computed by the virtual message re-encoder, the correct codeword is easily obtained. In one embodiment of the invention, any pattern of two erroneous symbols in a codeword of length n may be trapped in this manner by defining the predetermined permutation in accordance with a modulus n cyclic difference set. In this embodiment, for an RS(31, 25) code, the cyclic difference set (0, 4, 10, 23, 24, 26) may be used as the predetermined permutation.
摘要翻译：通过根据预定的排列转换，虚拟消息重新编码器的虚拟检查位置，在接收的码字中以任何模式发生的多个错误符号（高达一定的限制）可以同时被捕获在虚拟检查位置。通过简单地向虚拟消息重新编码器添加相应的虚拟检查符号，可以容易地获得正确的码字。在本发明的一个实施例中，通过根据模数n循环差集合定义预定的置换，可以以这种方式来捕获长度为n的码字中的两个错误符号的任何模式。在本实施例中，对于RS（31,25）码，循环差分集合（0,4,10,23,24,26）可以用作预定排列。

9. 发明授权

US4559625A Interleavers for digital communications 失效
标题翻译：用于数字通信的交织器
公开(公告)号：US4559625A
公开(公告)日：1985-12-17
申请号：US518213
申请日：1983-07-28
申请人： Elwyn R. Berlekamp , Po Tong
发明人： Elwyn R. Berlekamp , Po Tong
IPC分类号： H03M13/27 , H03M13/33 , H03M13/37 , G06F11/10
CPC分类号： H03M13/2728 , H03M13/33 , H03M13/37
摘要： An improved method and apparatus for interleaving block codes exploits helical symmetry whereby correspondingly positioned code symbols of code words of length n interleaved to depth i, i 1. The requirement for synchrony is reduced to a period counted modulo n instead of mod (n.times.i). For the case i=n-1, the total interleaving delay is reduced to 2(n-1)n and phase dependence of burst error onset is minimized. The performance of the de-interleaver is enhanced through a pseudo fade detector implemented by creating erasures prior to decoding, at certain positions for codewords subsequent to confirmed error. Synchronization of interleaver and de-interleaver is accomplished in apparatus which inspects all c contiguous bit patterns corresponding to a c bit synch symbol. To each c contiguous bit pattern of the data stream there is associated a probability counter for incrementing when the synch pattern is detected and decremented otherwise. Maximum probability establishes synch.
摘要翻译：用于交织块码的改进的方法和装置利用螺旋对称性，其中长度为n的码字交织到深度i i

10. 发明申请

US20050286566A1 Versatile erasure forecasting system for impulse noise mitigation 审中-公开
标题翻译：用于脉冲噪声抑制的多功能擦除预测系统
公开(公告)号：US20050286566A1
公开(公告)日：2005-12-29
申请号：US11159476
申请日：2005-06-23
申请人： Po Tong , Peter Liu
发明人： Po Tong , Peter Liu
IPC分类号： H04J3/06 , H04L1/00
CPC分类号： H04L1/0071 , H04L1/0057
摘要： The present invention provides a system for mitigating impulse noise effects in a digital data transmission system, particularly in a DSL-based communications system (300), by optimizing error correction systems with an erasure forecasting scheme. Within the communications system, encoding and structuring constructs form and permute data transmission units for transmission in a deterministic manner (i.e., having known, fixed characteristics). Once data transmission units have been received over a transmission channel, de-structuring and decoding constructs inversely permute and decode those data transmission units, according to the deterministic manner. Data decoding is monitored (302), and the occurrence of an impulse noise event in the transmission channel is identified (304). A first data transmission unit affected by the impulse noise event is decoded (306). A forecasting construct evaluates the decoded first data transmission unit using known characteristics of the deterministic manner (308, 310), and develops a forecast (312) of locations of an erasure error within a subsequent decoded data transmission unit, which is then utilized to optimize error correction.
摘要翻译：本发明通过利用擦除预测方案优化纠错系统来提供一种减轻数字数据传输系统中的脉冲噪声影响的系统，特别是在基于DSL的通信系统（300）中。在通信系统内，编码和结构化构造以确定性方式（即，具有已知的固定特性）形成和置换数据传输单元以进行传输。一旦已经通过传输信道接收到数据传输单元，解构和解码将根据确定性的方式对这些数据传输单元进行逆置换和解码。监视数据解码（302），识别发送信道中的脉冲噪声事件的发生（304）。受脉冲噪声事件影响的第一数据传输单元被解码（306）。预测结构使用确定性方式（308,310）的已知特征来评估解码的第一数据传输单元，并且形成随后的解码数据传输单元内的擦除错误的位置的预测（312），然后将其用于优化纠错。

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