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1. 发明授权

US08331134B2 Non-volatile static random access memory and operation method thereof 有权
标题翻译：非易失性静态随机存取存储器及其操作方法
公开(公告)号：US08331134B2
公开(公告)日：2012-12-11
申请号：US12853301
申请日：2010-08-10
申请人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
发明人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
IPC分类号： G11C11/00
CPC分类号： G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C14/0054 , G11C14/009
摘要： A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.
摘要翻译：提供了包括锁存单元，第一开关，第二开关，第一非易失性存储器（NVM）和第二NVM的非易失性静态随机存取存储器（NV-SRAM）及其操作方法。第一和第二开关的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二开关的第二端子分别连接到第一和第二位线。第一和第二开关的控制端子连接到字线。第一和第二NVM的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二NVM的第二端子分别连接到第一和第二位线。第一和第二NVM的使能端子连接到使能线。

2. 发明申请

US20110280073A1 NON-VOLATILE STATIC RANDOM ACCESS MEMORY AND OPERATION METHOD THEREOF 有权
标题翻译：非易失性静态随机访问存储器及其操作方法
公开(公告)号：US20110280073A1
公开(公告)日：2011-11-17
申请号：US12853301
申请日：2010-08-10
申请人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
发明人： Pi-Feng Chiu , Meng-Fan Chang , Ku-Feng Lin , Shyh-Shyuan Sheu
IPC分类号： G11C14/00
CPC分类号： G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C14/0054 , G11C14/009
摘要： A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.
摘要翻译：提供了包括锁存单元，第一开关，第二开关，第一非易失性存储器（NVM）和第二NVM的非易失性静态随机存取存储器（NV-SRAM）及其操作方法。第一和第二开关的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二开关的第二端子分别连接到第一和第二位线。第一和第二开关的控制端子连接到字线。第一和第二NVM的第一端子分别连接到闩锁单元的第一和第二端子。第一和第二NVM的第二端子分别连接到第一和第二位线。第一和第二NVM的使能端子连接到使能线。

3. 发明授权

US08392132B2 Process variation detection apparatus and process variation detection method 有权
标题翻译：过程变异检测装置及过程变异检测方法
公开(公告)号：US08392132B2
公开(公告)日：2013-03-05
申请号：US12851547
申请日：2010-08-05
申请人： Ku-Feng Lin , Meng-Fan Chang , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
发明人： Ku-Feng Lin , Meng-Fan Chang , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
IPC分类号： G06F19/00
CPC分类号： G01R31/2837 , G11C13/00 , G11C29/021 , G11C29/028 , G11C2029/0409 , H01L22/34
摘要： A process variation detection apparatus and a process variation detection method are provided. The process variation detection apparatus includes a process variation detector and a compensation signal generator. The process variation detector includes a first process variation detection component, a second process variation detection component and a current comparator. The channel of the first process variation detection component is a first conductive type, and the channel of the second process variation detection component is a second conductive type, wherein the above-mentioned first conductive type is different from the second conductive type. The current comparator is connected to the first process variation detection component and the second process variation detection component for comparing the current difference between the two components and outputting a current comparison result. The compensation signal generator is connected to the process variation detector, and produces a corresponding compensation signal according to the current comparison result.
摘要翻译：提供了一种过程变化检测装置和工艺变化检测方法。过程变化检测装置包括处理变化检测器和补偿信号发生器。过程变化检测器包括第一过程变化检测部件，第二过程变化检测部件和电流比较器。第一处理变化检测部件的通道是第一导电型，第二处理变化检测部件的通道是第二导电型，其中上述第一导电类型与第二导电类型不同。电流比较器连接到第一处理变化检测部件和第二处理变化检测部件，用于比较两个部件之间的电流差异并输出当前的比较结果。补偿信号发生器连接到过程变化检测器，并根据当前比较结果产生相应的补偿信号。

4. 发明申请

US20110270555A1 PROCESS VARIATION DETECTION APPARATUS AND PROCESS VARIATION DETECTION METHOD 有权
标题翻译：过程变化检测装置和过程变化检测方法
公开(公告)号：US20110270555A1
公开(公告)日：2011-11-03
申请号：US12851547
申请日：2010-08-05
申请人： Ku-Feng Lin , Meng-Fan Chang , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
发明人： Ku-Feng Lin , Meng-Fan Chang , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
IPC分类号： G06F19/00 , G01R19/00
CPC分类号： G01R31/2837 , G11C13/00 , G11C29/021 , G11C29/028 , G11C2029/0409 , H01L22/34
摘要： A process variation detection apparatus and a process variation detection method are provided. The process variation detection apparatus includes a process variation detector and a compensation signal generator. The process variation detector includes a first process variation detection component, a second process variation detection component and a current comparator. The channel of the first process variation detection component is a first conductive type, and the channel of the second process variation detection component is a second conductive type, wherein the above-mentioned first conductive type is different from the second conductive type. The current comparator is connected to the first process variation detection component and the second process variation detection component for comparing the current difference between the two components and outputting a current comparison result. The compensation signal generator is connected to the process variation detector, and produces a corresponding compensation signal according to the current comparison result.
摘要翻译：提供了一种过程变化检测装置和工艺变化检测方法。过程变化检测装置包括处理变化检测器和补偿信号发生器。过程变化检测器包括第一过程变化检测部件，第二过程变化检测部件和电流比较器。第一处理变化检测部件的通道是第一导电型，第二处理变化检测部件的通道是第二导电型，其中上述第一导电类型与第二导电类型不同。电流比较器连接到第一处理变化检测部件和第二处理变化检测部件，用于比较两个部件之间的电流差异并输出当前的比较结果。补偿信号发生器连接到过程变化检测器，并根据当前比较结果产生相应的补偿信号。

5. 发明授权

US08213213B2 Reference current generator for resistance type memory and method thereof 有权
标题翻译：电阻型存储器的参考电流发生器及其方法
公开(公告)号：US08213213B2
公开(公告)日：2012-07-03
申请号：US12614631
申请日：2009-11-09
申请人： Meng-Fan Chang , Ku-Feng Lin , Pi-Feng Chiu
发明人： Meng-Fan Chang , Ku-Feng Lin , Pi-Feng Chiu
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C5/147 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0038 , G11C13/004 , G11C2013/0054
摘要： A reference current generator for a resistance type memory and a method thereof is disclosed. The reference current generator comprises N parallel circuit sets. Each of the N parallel circuit sets is formed with at least one first reference element and second reference elements connected in parallel. The number of the first reference elements plus the number of the second reference elements is N. The resistance value of first reference elements (a first resistance value) is not equal to the resistance value of the second reference elements (a second resistance value). An equivalent resistance provided with a equivalent resistance value between the first and second resistance value is formed by connecting the N parallel circuit sets in series between an input terminal and output terminal. A reference current is outputted from the output terminal by applying an operation voltage to the input terminal.
摘要翻译：公开了一种用于电阻型存储器的参考电流发生器及其方法。参考电流发生器包括N个并联电路组。 N个并联电路组中的每一个形成有并联连接的至少一个第一参考元件和第二参考元件。第一参考元件的数量加上第二参考元件的数量为N.第一参考元件（第一电阻值）的电阻值不等于第二参考元件的电阻值（第二电阻值）。通过在输入端子和输出端子之间串联连接N个并联电路组来形成具有第一和第二电阻值之间的等效电阻值的等效电阻。通过对输入端施加工作电压，从输出端子输出基准电流。

6. 发明申请

US20110110140A1 REFERENCE CURRENT GENERATOR FOR RESISTANCE TYPE MEMORY AND METHOD THEREOF 有权
标题翻译：用于电阻型存储器的参考电流发生器及其方法
公开(公告)号：US20110110140A1
公开(公告)日：2011-05-12
申请号：US12614631
申请日：2009-11-09
申请人： Meng-Fan Chang , Ku-Feng Lin , Pi-Feng Chiu
发明人： Meng-Fan Chang , Ku-Feng Lin , Pi-Feng Chiu
IPC分类号： G11C11/00 , G11C7/02 , G11C5/14
CPC分类号： G11C7/14 , G11C5/147 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0038 , G11C13/004 , G11C2013/0054
摘要： A reference current generator for a resistance type memory and a method thereof is disclosed. The reference current generator comprises N parallel circuit sets. Each of the N parallel circuit sets is formed with at least one first reference element and second reference elements connected in parallel. The number of the first reference elements plus the number of the second reference elements is N. The resistance value of first reference elements (a first resistance value) is not equal to the resistance value of the second reference elements (a second resistance value). An equivalent resistance provided with a equivalent resistance value between the first and second resistance value is formed by connecting the N parallel circuit sets in series between an input terminal and output terminal. A reference current is outputted from the output terminal by applying an operation voltage to the input terminal.
摘要翻译：公开了一种用于电阻型存储器的参考电流发生器及其方法。参考电流发生器包括N个并联电路组。 N个并联电路组中的每一个形成有并联连接的至少一个第一参考元件和第二参考元件。第一参考元件的数量加上第二参考元件的数量为N.第一参考元件（第一电阻值）的电阻值不等于第二参考元件的电阻值（第二电阻值）。通过在输入端子和输出端子之间串联连接N个并联电路组来形成具有第一和第二电阻值之间的等效电阻值的等效电阻。通过对输入端施加工作电压，从输出端子输出基准电流。

7. 发明授权

US08378716B2 Bulk-driven current-sense amplifier and operating method thereof 有权
标题翻译：体驱动电流检测放大器及其操作方法
公开(公告)号：US08378716B2
公开(公告)日：2013-02-19
申请号：US13178698
申请日：2011-07-08
申请人： Che-Wei Wu , Meng-Fan Chang , Ku-Feng Lin
发明人： Che-Wei Wu , Meng-Fan Chang , Ku-Feng Lin
IPC分类号： G01R19/00
CPC分类号： G11C7/06 , G11C7/062 , G11C13/0002 , G11C13/004 , G11C2013/0042 , G11C2013/0054
摘要： A bulk-driven current-sense amplifier and an amplifier operating method are disclosed. The bulk-driven current-sense amplifier includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier, and a first node is formed at a connectivity segment of the first driver. The second drive is coupled to the differential amplifier, and a second node is formed at a connectivity segment of the second driver. When a first switch of the first driver and a second switch of the second driver are turned on, the differential amplifier charges the first node and the second node. When the charging is completed, the first node and the second node respectively have a different stabilized potential according to currents separately flowing through a first memory unit of the first driver and a second memory unit of the second drive, and the differential amplifier generates a voltage.
摘要翻译：公开了体驱动电流检测放大器和放大器操作方法。体驱动电流检测放大器包括差分放大器，第一驱动器和第二驱动器。第一驱动器耦合到差分放大器，并且第一节点形成在第一驱动器的连接段处。第二驱动器耦合到差分放大器，并且第二节点形成在第二驱动器的连接段处。当第一驱动器的第一开关和第二驱动器的第二开关导通时，差分放大器对第一节点和第二节点充电。当充电完成时，第一节点和第二节点分别根据分别流过第一驱动器的第一存储器单元的电流和第二驱动器的第二存储器单元分别具有不同的稳定电位，并且差分放大器产生电压。

8. 发明授权

US08842489B2 Fast-switching word line driver 有权
标题翻译：快速切换字线驱动
公开(公告)号：US08842489B2
公开(公告)日：2014-09-23
申请号：US13447318
申请日：2012-04-16
申请人： Hung-Chang Yu , Ku-Feng Lin , Kai-Chun Lin , Yue-Der Chih
发明人： Hung-Chang Yu , Ku-Feng Lin , Kai-Chun Lin , Yue-Der Chih
IPC分类号： G11C5/14
CPC分类号： G11C11/418 , G11C8/08 , G11C11/4085
摘要： A word line driver of a semiconductor memory includes logic circuitry for coupling a word line to a first node set at a first voltage level when the word line driver is in a first state or to a second node set at a second voltage level when the word line driver is in a second state. A capacitor is configured to be charged to a third voltage level that is greater than the first and second voltage levels. First and second transistors are configured to selectively couple the word line to the capacitor and to a third node set at a fourth voltage level when the word line driver is in a third state. The fourth voltage level is greater than the first voltage level and less than the second voltage level.
摘要翻译：半导体存储器的字线驱动器包括逻辑电路，用于当字线驱动器处于第一状态时将字线耦合到设置在第一电压电平处的第一节点，或者当字线驱动器处于第二电压电平时将字线耦合到设置为第二电压电平的第二节点线路驱动器处于第二状态。电容器被配置为被充电到大于第一和第二电压电平的第三电压电平。第一和第二晶体管被配置为当字线驱动器处于第三状态时，将字线选择性地耦合到电容器和设置在第四电压电平的第三节点。第四电压电平大于第一电压电平并小于第二电压电平。

9. 发明授权

US09177621B2 Fast bit-line pre-charge scheme 有权
标题翻译：快速位线预充电方案
公开(公告)号：US09177621B2
公开(公告)日：2015-11-03
申请号：US13600867
申请日：2012-08-31
申请人： Hung-Chang Yu , Ku-Feng Lin
发明人： Hung-Chang Yu , Ku-Feng Lin
IPC分类号： G11C7/00 , G11C7/12 , G11C11/4094
CPC分类号： G11C7/12 , G11C11/4094 , G11C2207/002 , G11C2207/005
摘要： A device includes a first switch configured to control a connection between a first voltage node and a capacitor, and a second switch configured to control a connection between a common charge node and the capacitor. The device further includes a plurality of bit-lines, and a plurality of bit-line charge switches, each configured to control a connection between a respective one of the plurality of bit-lines and the common charge node.
摘要翻译：器件包括被配置为控制第一电压节点和电容器之间的连接的第一开关和被配置为控制公共电荷节点和电容器之间的连接的第二开关。该装置还包括多个位线和多个位线充电开关，每个位线充电开关被配置为控制多个位线中的相应一个位线和公共电荷节点之间的连接。

10. 发明申请

US20140064000A1 Fast Bit-Line Pre-Charge Scheme 有权
标题翻译：快速位线预充电方案
公开(公告)号：US20140064000A1
公开(公告)日：2014-03-06
申请号：US13600867
申请日：2012-08-31
申请人： Hung-Chang Yu , Ku-Feng Lin
发明人： Hung-Chang Yu , Ku-Feng Lin
IPC分类号： G11C7/12
CPC分类号： G11C7/12 , G11C11/4094 , G11C2207/002 , G11C2207/005
摘要： A device includes a first switch configured to control a connection between a first voltage node and a capacitor, and a second switch configured to control a connection between a common charge node and the capacitor. The device further includes a plurality of bit-lines, and a plurality of bit-line charge switches, each configured to control a connection between a respective one of the plurality of bit-lines and the common charge node.
摘要翻译：一种设备包括被配置为控制第一电压节点和电容器之间的连接的第一开关和被配置为控制公共电荷节点和电容器之间的连接的第二开关。该装置还包括多个位线和多个位线充电开关，每个位线充电开关被配置为控制多个位线中的相应一个位线和公共电荷节点之间的连接。

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