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1. 发明申请

US20050111353A1 Memory management system having a linked list processor 有权
标题翻译：内存管理系统具有链表处理器
公开(公告)号：US20050111353A1
公开(公告)日：2005-05-26
申请号：US10699315
申请日：2003-10-31
申请人： Peter Zievers
发明人： Peter Zievers
IPC分类号： G06F12/02 , G06F12/00 , G06F12/06 , G06F12/08 , G06F13/16 , G06F13/38 , H04L13/08 , H04L1/00
CPC分类号： G06F13/1673 , G06F12/0802
摘要： A memory management system adapted to process linked list data files. The system has a plurality of low storage capacity high speed memories and a lower speed high storage capacity bulk memory. An access flow regulator generates requests for the reading and writing of linked list files by the memories. The head and tail buffers and at any intermediate buffers of a linked list are written into the high speed memories. The intermediate buffers are immediately transferred from the high speed memories to said bulk memory while leaving the head buffer and the tail buffer of the linked list in the high speed memories. In read operations, the head and tail buffers are read from the high speed memories. The intermediate buffers are transferred from the bulk memory to said the high speed memory and then read from the high speed memories.
摘要翻译：适于处理链表的数据文件的存储器管理系统。该系统具有多个低存储容量的高速存储器和较低速度的高存储容量的大容量存储器。访问流量调节器生成由存储器读取和写入链接的列表文件的请求。头尾缓冲器和链表的任何中间缓冲器被写入高速存储器。中间缓冲器立即从高速存储器转移到所述批量存储器，同时将高速存储器中的链接列表的头缓冲器和尾缓冲器留下。在读操作中，从高速存储器读取头和尾缓冲器。中间缓冲器从大容量存储器传送到高速存储器，然后从高速存储器读取。

2. 发明申请

US20050108464A1 Contention resolution in a memory management system 有权
标题翻译：内存管理系统中的争用解决方案
公开(公告)号：US20050108464A1
公开(公告)日：2005-05-19
申请号：US10699530
申请日：2003-10-31
申请人： Peter Zievers
发明人： Peter Zievers
IPC分类号： G06F12/00
CPC分类号： G06F13/1647
摘要： A memory management system for resolving contention for access to a plurality of memories. Signals are continuously applied to an access flow regulator indicating the busy/idle state of each memory. The access flow regulator uses the received signals to determine the present busy/idle state of each of the memories. Requests are applied to the access flow regulator for read and write access to the memories. The access flow regulator operates in response to a determination that one of the memories is currently idle for granting a request access to a memory as soon as it switches from a busy to and idle state.
摘要翻译：一种用于解决访问多个存储器的争用的存储器管理系统。信号被连续地应用于指示每个存储器的忙/闲状态的访问流量调节器。接入流调节器使用接收到的信号来确定每个存储器的当前忙/闲状态。请求被应用于访问流量调节器以对存储器进行读写访问。接入流调节器响应于确定当其中一个存储器当前处于空闲状态时，一旦它从忙到空状态切换到对存储器的请求访问。

3. 发明申请

US20050097259A1 Memory management system for a data processing system 有权
标题翻译：数据处理系统的内存管理系统
公开(公告)号：US20050097259A1
公开(公告)日：2005-05-05
申请号：US10699355
申请日：2003-10-31
申请人： Peter Zievers
发明人： Peter Zievers
IPC分类号： G06F7/00 , G06F12/08
CPC分类号： G06F12/0802
摘要： A memory management system adapted to process large data files. The system has a plurality of low storage capacity high speed memories and a lower speed high storage capacity bulk memory. An access flow regulator generates requests for the reading and writing of data files by the memories. Large data files have a first part and an excess portion. Both parts of each file are written into the high speed memories. The excess portion of each file is immediately transferred from the high speed memories to the bulk memory while leaving the first part in the high speed memories. In read operations, the first part is read from the high speed memories. The excess portion is transferred from the bulk memory to the high speed memory in a burst mode and then read from the high speed memories.
摘要翻译：适用于处理大数据文件的内存管理系统。该系统具有多个低存储容量的高速存储器和较低速度的高存储容量的大容量存储器。访问流量调节器产生由存储器读取和写入数据文件的请求。大数据文件具有第一部分和多余部分。每个文件的两个部分被写入高速存储器。每个文件的多余部分立即从高速存储器转移到大容量存储器，同时将第一部分留在高速存储器中。在读取操作中，从高速存储器读取第一部分。多余部分以突发模式从批量存储器传送到高速存储器，然后从高速存储器读取。

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