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    • 1. 发明申请
    • GATE CONTROLLED PN FIELD-EFFECT TRANSISTOR AND THE CONTROL METHOD THEREOF
    • 门控制PN场效应晶体管及其控制方法
    • US20120200342A1
    • 2012-08-09
    • US13501826
    • 2011-05-19
    • Pengfei WangSonggan ZangQingqing SunWei Zhang
    • Pengfei WangSonggan ZangQingqing SunWei Zhang
    • G05F3/02H01L29/04H01L29/78
    • H01L29/7391H01L29/66356
    • The present invention belongs to the technical field of semiconductor devices, and more specifically, relates to a gate-controlled PN field-effect transistor and the control method thereof The gate-controlled PN field-effect transistor disclosed by the present invention comprises a semiconductor substrate region, a drain region and a source region on the left and right sides of the substrate region, and gate regions on the upper and lower sides of the substrate region. The gate-controlled PN field-effect transistor works in the positive bias state of the source-drain PN junction and is conducted from the middle of the substrate region. The gate-controlled PN field-effect transistor provided by the present invention decreases the leakage current and increases the drive current at the same time, namely decreases the chip power consumption and improves the chip performances at the same time. The present invention further discloses a method for controlling the gate-controlled PN field-effect transistor, including cut-off and conduction operation.
    • 本发明属于半导体器件的技术领域,更具体地涉及一种栅极控制PN场效应晶体管及其控制方法本发明公开的栅极控制PN场效应晶体管包括半导体衬底 区域,漏极区域和源极区域以及衬底区域的上侧和下侧上的栅极区域。 栅极控制的PN场效应晶体管工作在源极 - 漏极PN结的正偏置状态,并从衬底区域的中间传导。 本发明提供的栅控PN场效应晶体管同时降低漏电流并增加驱动电流,即降低芯片功耗,同时提高芯片性能。 本发明还公开了一种用于控制栅极控制的PN场效应晶体管的方法,包括截止和导通操作。