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    • 5. 发明授权
    • Integrated circuit including power diode
    • 集成电路包括功率二极管
    • US07964933B2
    • 2011-06-21
    • US11821234
    • 2007-06-22
    • Paul ChangGeeng-Chuan ChernPrognyan GhoshWayne Y. W. HsuehVladimir Rodov
    • Paul ChangGeeng-Chuan ChernPrognyan GhoshWayne Y. W. HsuehVladimir Rodov
    • H01L21/76
    • H01L27/0629H01L29/0692H01L29/78H01L29/861
    • A method of fabricating a semiconductor integrated circuit including a power diode includes providing a semiconductor substrate of first conductivity type, fabricating a integrated circuit such as a CMOS transistor circuit in a first region of the substrate, and fabricating a power diode in a second region in the semiconductor substrate. Dielectric material is formed between the first region and the second regions thereby providing electrical isolation between the integrated circuit in the first region and the power diode in the second region. The power diode can comprise a plurality of MOS source/drain elements and associated gate elements all connected together by one electrode of the diode, and a semiconductor layer in the second region can function as another source/drain of the power diode.
    • 一种制造包括功率二极管的半导体集成电路的方法包括提供第一导电类型的半导体衬底,在衬底的第一区域中制造诸如CMOS晶体管电路的集成电路,并且在第二区域中制造功率二极管 半导体衬底。 介电材料形成在第一区域和第二区域之间,从而在第一区域中的集成电路与第二区域中的功率二极管之间提供电隔离。 功率二极管可以包括由二极管的一个电极连接在一起的多个MOS源极/漏极元件和相关联的栅极元件,并且第二区域中的半导体层可以用作功率二极管的另一个源极/漏极。
    • 8. 发明授权
    • Method of fabricating power rectifier device to vary operating parameters and resulting device
    • 制造动力整流装置以改变运行参数和产生的装置的方法
    • US06448160B1
    • 2002-09-10
    • US09544730
    • 2000-04-06
    • Paul ChangGeeng-Chuan ChernWayne Y. W. HsuehVladimir Rodov
    • Paul ChangGeeng-Chuan ChernWayne Y. W. HsuehVladimir Rodov
    • H01L2144
    • H01L29/7802H01L21/2815H01L27/0727H01L27/0814H01L27/095H01L29/0619H01L29/0634H01L29/1095H01L29/66712H01L29/781H01L29/861H01L29/872H01L2924/0002H01L2924/00
    • A semiconductor rectifying device which emulates the characteristics of a low forward voltage drop Schottky diode and which is capable of a variety of electrical characteristics from less than 1 A to greater than 1000 A current with adjustable breakdown voltage. The manufacturing process provides for uniformity and controllability of operating parameters, high yield, and readily variable device sizes. The device includes a semiconductor body with a guard ring on one surface to define a device region in which are optionally formed a plurality of conductive plugs. Between the guard ring and the conductive plugs are a plurality of source/drain, gate and channel elements which function with the underlying substrate in forming a MOS transistor. The channel regions are defined by using the photoresist mask for the gate oxide with the photoresist mask isotropically etched to expose a peripheral portion of the gate oxide (and gate electrode) with ions thereafter implanted through the exposed gate for forming the channel region. The source/drain (e.g. source) regions can be formed by ion implantation or by out-diffusion from a doped polysilicon layer.
    • 一种半导体整流装置,其模拟低正向压降肖特基二极管的特性,并能够具有小于1A至大于1000A电流的多种电气特性,具有可调击穿电压。 制造过程提供了操作参数的均匀性和可控性,高产量和容易变化的装置尺寸。 该器件包括在一个表面上具有保护环的半导体本体,以限定其中可选地形成多个导电插塞的器件区域。 在保护环和导电插塞之间是形成MOS晶体管的多个源极/漏极,栅极和沟道元件,其与下面的衬底起作用。 通过使用用于栅极氧化物的光致抗蚀剂掩模来限定沟道区,其中光致抗蚀剂掩模被各向同性蚀刻以暴露栅极氧化物(和栅电极)的外围部分,然后通过暴露的栅极注入用于形成沟道区的离子。 源极/漏极(例如源极)区域可以通过离子注入或通过从掺杂多晶硅层向外扩散来形成。