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    • 3. 发明授权
    • Method and apparatus for artificially generating general purpose events in an ACPI environment
    • 在ACPI环境中人为地生成通用事件的方法和装置
    • US06219742B1
    • 2001-04-17
    • US09069271
    • 1998-04-29
    • Paul C. Stanley
    • Paul C. Stanley
    • G06F1324
    • G06F9/4411G06F1/26
    • A hardware implementation of the General Purpose Event status register supports the ability to assert, under software control, individual General Purpose Event status bits in a General Purpose Event register in an ACPI environment. Software control over the General Purpose Event register allows compensation of a platform electronic apparatus for design defects discovered late in the development cycle. Software control also enables the creation at any time of new “hardware events” which are then processed by the ACPI driver by means of manufacturer provided P-code. The ability to provide a software work-around for a wide range of ACPI related difficulties is advantageously created. Moreover, additional ACPI value-added features can thereafter be developed to differentiate and enhance ACPI compatible products.
    • 通用事件状态寄存器的硬件实现支持在软件控制下在ACPI环境中通用通用事件寄存器中的各个通用事件状态位的能力。 通用事件寄存器的软件控制可以补偿平台电子设备在开发周期后期发现的设计缺陷。 软件控制还可以在任何时候创建新的“硬件事件”,然后由制造商提供的P代码由ACPI驱动程序处理。 有利地创造了为广泛的ACPI相关困难提供软件解决方案的能力。 此外,此后可以开发额外的ACPI增值功能,以区分和增强ACPI兼容产品。
    • 4. 发明授权
    • Method and apparatus for providing support for dynamic resource assignment and configuration of peripheral devices when enabling or disabling plug-and-play aware operating systems
    • US06457069B1
    • 2002-09-24
    • US09121448
    • 1998-07-23
    • Paul C. Stanley
    • Paul C. Stanley
    • G06F300
    • G06F9/4411
    • A computer system allows devices to be unmasked so to be detected or to be masked invisible to the Plug-and-Play architecture or similar architectures. When operating under Plug-and-Play, which assigns systems resources to system devices in a predetermined order despite a limited number of such resources, a user uses software to set the switch in the device's memory such that an undesired device becomes “invisible” to a subsequent power-up configuration of the system. Device configuration proceeds in two phases. During a first configuration phase, the invisible device cannot be configured, i.e. cannot be assigned resources, including interrupt request lines. Hence, those lines remain available to other devices on the system that would not have received resource allocation during a prior-art configuration. During the first phase, the other devices can be assigned the necessary resources to operate properly. Thus, software can command a configuration that would otherwise be impossible. During a second phase, yet-unconfigured devices are configured. When commanded to do so by software, the memory is reset such that the device becomes visible and thus configurable by the Plug-and-Play architecture. The switch is either a non-volatile memory on the device itself, or a dedicated region within the PCI configuration space. When the system is rebooted, the devices that are invisible are not assigned resources, while the visible devices are assigned resources including interrupt request lines. Thus, a programmable select mask prevents configuration of the peripheral during a first configuration phase when the peripheral device is masked and permits configuration of the peripheral during the first configuration phase when the peripheral device is unmasked. A programmable select mask register or a programmable select mask routine (the latter being executable by the processor) includes a mask indicator corresponding to a peripheral device. If desired, the mask indicator itself forms the invention. The invention also includes a step of, during a second configuration phase, configuring the peripheral device.
    • 5. 发明授权
    • Method and apparatus for peripheral device control by clients in plural
memory addressing modes
    • 用于在多个存储器寻址模式中的客户机进行外围设备控制的方法和装置
    • US5797031A
    • 1998-08-18
    • US920096
    • 1997-08-26
    • Raymond E. ShapiroPaul C. StanleySteven Schumacher
    • Raymond E. ShapiroPaul C. StanleySteven Schumacher
    • G06F9/50G06F13/00
    • G06F9/5016
    • A digital data processor has a central processing unit (CPU) that operates in plural addressing modes and or more adapters for receiving peripheral devices, e.g., PCMCIA devices. A first peripheral device service subsystem that handles communications between peripheral devices coupled to the adapters and software clients executing on the CPU in a first addressing mode. A second peripheral device service subsystem that handles communications between peripheral devices coupled to the adapters and clients executing on the CPU in a second addressing mode. The first peripheral device subsystem includes a configuration management section that allocates digital data processor resources, e.g., memory space, input/output channels, direct memory access (DMA) channels and interrupt (IRQ) levels, used for communications between the peripheral devices and clients, regardless of whether those clients are executing in the first or second addressing modes.
    • 数字数据处理器具有以多种寻址模式操作的中央处理单元(CPU)和/或用于接收外围设备(例如PCMCIA设备)的更多适配器。 第一外围设备服务子系统,以第一寻址模式处理耦合到适配器的外围设备与在CPU上执行的软件客户端之间的通信。 第二外围设备服务子系统,处理耦合到适配器的外围设备与在第二寻址模式下在CPU上执行的客户端之间的通信。 第一外围设备子系统包括配置管理部分,其分配用于外围设备和客户端之间的通信的数字数据处理器资源,例如存储器空间,输入/输出通道,直接存储器存取(DMA)通道和中断(IRQ) 无论这些客户端是以第一还是第二寻址模式执行。