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    • 1. 发明公开
    • FREQUENCY MULTIPLIER CIRCUIT
    • US20230361761A1
    • 2023-11-09
    • US18143854
    • 2023-05-05
    • Paragraf Limited
    • Ivor GUINEYThomas James BADCOCKRobert WALLIS
    • H03B19/14H03K5/00
    • H03K5/00006H03B19/14
    • According to a first aspect of the disclosure, an integrated frequency multiplier circuit is provided. The circuit comprises a substrate, a strip of graphene, first and second electrode, a dielectric layer, a frequency input electrode, and a frequency output electrode. The strip of graphene has a uniform width provided on the substrate, the strip having a width x and a length y extending from a first end to a second end. The first and second electrodes are provided in electrical contact with the strip of graphene at the first and second ends of the strip of graphene respectively. The dielectric layer is provided on the strip of graphene, wherein the dielectric layer is provided across the width x of the strip of graphene. The frequency input electrode is formed on the dielectric layer, wherein the frequency input electrode is provided across the width x of the strip of graphene. The frequency input electrode is provided over the strip of graphene at a location closer to the first end of the strip of graphene than the second end. The frequency output electrode is provided in electrical contact with the strip of graphene at a location along the length of the strip of graphene between the second electrode and the frequency input electrode, spaced apart from the second electrode.