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1. 发明授权

US08558613B2 Apparatus and method for digitally-controlled automatic gain amplification 有权
标题翻译：用于数字控制自动增益放大的装置和方法
公开(公告)号：US08558613B2
公开(公告)日：2013-10-15
申请号：US13196430
申请日：2011-08-02
申请人： Pablo Acosta-Serafini , Kimo Tam , Stuart McCracken , Daniel Mulcahy
发明人： Pablo Acosta-Serafini , Kimo Tam , Stuart McCracken , Daniel Mulcahy
IPC分类号： H03G3/20
CPC分类号： H03G3/30 , H03G3/3052 , H03G3/3078 , H04L25/03878
摘要： Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.
摘要翻译：公开了诸如涉及接收机设备的装置和方法。一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。均衡器可以包括可编程增益放大器（PGA）块，其包括被配置为接收输入信号的输入节点; 输出节点; 和可编程增益放大器（PGA）。 PGA以可调增益放大输入信号。 PGA块还包括具有电耦合到输入节点的输入的增益控制块。增益控制块被配置为至少部分地响应于来自输入节点的输入信号来调整PGA的增益，使得PGA向输出节点产生具有基本上恒定的幅度包络的输出信号。

2. 发明申请

US20130033326A1 APPARATUS AND METHOD FOR DIGITALLY-CONTROLLED AUTOMATIC GAIN AMPLIFICATION 有权
标题翻译：用于数字控制自动增益放大的装置和方法
公开(公告)号：US20130033326A1
公开(公告)日：2013-02-07
申请号：US13196430
申请日：2011-08-02
申请人： Pablo Acosta-Serafini , Kimo Tam , Stuart McCracken , Daniel Mulcahy
发明人： Pablo Acosta-Serafini , Kimo Tam , Stuart McCracken , Daniel Mulcahy
IPC分类号： H03G3/30
CPC分类号： H03G3/30 , H03G3/3052 , H03G3/3078 , H04L25/03878
摘要： Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.
摘要翻译：公开了诸如涉及接收机设备的装置和方法。一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。均衡器可以包括可编程增益放大器（PGA）块，其包括被配置为接收输入信号的输入节点; 输出节点; 和可编程增益放大器（PGA）。 PGA以可调增益放大输入信号。 PGA块还包括具有电耦合到输入节点的输入的增益控制块。增益控制块被配置为至少部分地响应于来自输入节点的输入信号来调整PGA的增益，使得PGA向输出节点产生具有基本上恒定的幅度包络的输出信号。

3. 发明授权

US08718127B2 Apparatus and method for digitally-controlled adaptive equalizer 有权
标题翻译：数字控制自适应均衡器的装置和方法
公开(公告)号：US08718127B2
公开(公告)日：2014-05-06
申请号：US13196332
申请日：2011-08-02
申请人： Pablo Acosta-Serafini , Kimo Tam
发明人： Pablo Acosta-Serafini , Kimo Tam
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03878
摘要： Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer includes a first node configured to receive the input signal; a second node; and a programmable gain amplifier (PGA) having an adjustable gain. The PGA has an input electrically coupled to the first node, and an output electrically coupled to a third node. The equalizer also includes a high pass filter (HPF) having an input electrically coupled to the third node, and an output electrically coupled to the second node; and a control block configured to adjust one or more of the PGA or the HPF at least partly in response to a PGA output signal from the PGA or an HPF output signal from the HPF.
摘要翻译：公开了诸如涉及接收机设备的装置和方法。一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。均衡器包括被配置为接收输入信号的第一节点; 第二个节点; 以及具有可调增益的可编程增益放大器（PGA）。 PGA具有电耦合到第一节点的输入和电耦合到第三节点的输出。均衡器还包括具有电耦合到第三节点的输入的高通滤波器（HPF）和电耦合到第二节点的输出; 以及控制块，被配置为至少部分地响应于来自PGA的PGA输出信号或来自HPF的HPF输出信号来调整PGA或HPF中的一个或多个。

4. 发明申请

US20130034143A1 APPARATUS AND METHOD FOR DIGITALLY-CONTROLLED ADAPTIVE EQUALIZER 有权
标题翻译：用于数字控制自适应均衡器的装置和方法
公开(公告)号：US20130034143A1
公开(公告)日：2013-02-07
申请号：US13196332
申请日：2011-08-02
申请人： Pablo Acosta-Serafini , Kimo Tam
发明人： Pablo Acosta-Serafini , Kimo Tam
IPC分类号： H04L27/01
CPC分类号： H04L25/03878
摘要： Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer includes a first node configured to receive the input signal; a second node; and a programmable gain amplifier (PGA) having an adjustable gain. The PGA has an input electrically coupled to the first node, and an output electrically coupled to a third node. The equalizer also includes a high pass filter (HPF) having an input electrically coupled to the third node, and an output electrically coupled to the second node; and a control block configured to adjust one or more of the PGA or the HPF at least partly in response to a PGA output signal from the PGA or an HPF output signal from the HPF.
摘要翻译：公开了诸如涉及接收机设备的装置和方法。一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。均衡器包括被配置为接收输入信号的第一节点; 第二个节点; 以及具有可调增益的可编程增益放大器（PGA）。 PGA具有电耦合到第一节点的输入和电耦合到第三节点的输出。均衡器还包括具有电耦合到第三节点的输入的高通滤波器（HPF）和电耦合到第二节点的输出; 以及控制块，被配置为至少部分地响应于来自PGA的PGA输出信号或来自HPF的HPF输出信号来调整PGA或HPF中的一个或多个。

5. 发明申请

US20060126606A1 Crosspoint switch with low reconfiguration latency 有权
标题翻译：交叉点开关具有低重构延迟
公开(公告)号：US20060126606A1
公开(公告)日：2006-06-15
申请号：US11011560
申请日：2004-12-14
申请人： Daniel Mulcahy , Kimo Tam
发明人： Daniel Mulcahy , Kimo Tam
IPC分类号： H03K17/76 , H04L12/50 , H04Q11/00
CPC分类号： H03K19/00323 , H03K19/0016
摘要： A method of operating a circuit for processing a digital signal is disclosed. The circuit includes various circuit stages having respective enabled states. A present signal path is established which includes circuit stages in their respective enabled states. Power is disabled to selected circuit stages not used in the present signal path so as to minimize power consumption in the disabled circuit stages. A data signal is then processed through the circuit stages in the present signal path. Before a next signal path is needed, power is re-enabled to selected disabled circuit stages in the next signal path to allow the enabled circuit stages to approach their respective enabled states. Then the next signal path can be established including the enabled circuit stages in their respective enabled states. The data signal can then be processed through the circuit stages in the next signal path.
摘要翻译：公开了一种操作数字信号处理电路的方法。电路包括具有各自使能状态的各种电路级。建立包括其各自使能状态中的电路级的当前信号路径。电源被禁用在当前信号路径中未使用的选定电路级，以便使残留电路级中的功耗最小化。然后通过当前信号路径中的电路级处理数据信号。在需要下一个信号路径之前，将电源重新启用到下一个信号路径中的选定的禁用电路级，以允许使能的电路级接近其各自的使能状态。然后可以建立下一个信号路径，其中包括使能的电路级在它们各自的使能状态。然后可以通过下一个信号路径中的电路级来处理数据信号。

6. 发明授权

US09467310B2 Wide common-mode range receiver 有权
标题翻译：宽共模范围接收器
公开(公告)号：US09467310B2
公开(公告)日：2016-10-11
申请号：US13457213
申请日：2012-04-26
申请人： Jesse Bankman , Quanli Lu , Kimo Tam
发明人： Jesse Bankman , Quanli Lu , Kimo Tam
IPC分类号： H04L25/02 , H03F3/45 , H03F3/50 , H04L25/03
CPC分类号： H03H7/40 , H03F3/45076 , H03F3/50 , H03F2200/294 , H03F2200/453 , H03F2203/45306 , H04L25/0274 , H04L25/0276 , H04L25/0296 , H04L25/03878
摘要： A wide common-mode range receiver includes an input module, voltage level shift module, voltage level shift control module, and output module. The receiver can also include an equalizer. The receiver translates data originating from a circuit powered from an external voltage supply to a circuit powered by an internal voltage supply. The voltage level shift may be scaled based on differences between the voltage supplies or by determining the difference between an input common-mode voltage and a reference voltage, and driving a servo based on the difference.
摘要翻译：宽共模范围接收器包括输入模块，电压电平移位模块，电压电平移位控制模块和输出模块。接收机还可以包括均衡器。接收器将从外部电源供电的电路的数据转换为由内部电源供电的电路。可以基于电压供应之间的差异或通过确定输入共模电压和参考电压之间的差异来缩放电压电平偏移，并且基于该差来驱动伺服。

7. 发明授权

US08680938B2 Apparatus and method for equalization 有权
标题翻译：用于均衡的装置和方法
公开(公告)号：US08680938B2
公开(公告)日：2014-03-25
申请号：US13093372
申请日：2011-04-25
申请人： Michael St. Germain , Jennifer Lloyd , Kimo Tam
发明人： Michael St. Germain , Jennifer Lloyd , Kimo Tam
IPC分类号： H04B3/14 , H03F3/45
CPC分类号： H03F3/4508 , H03F2203/45458 , H03F2203/45476 , H03F2203/45544 , H03F2203/45696 , H03F2203/45726
摘要： Apparatus and methods for equalization are provided. In one embodiment, an apparatus for equalizing an input voltage includes a first capacitor and a first resistor having a first end and a second end, the first end configured to receive the input voltage. The apparatus further includes a second resistor having a first end electrically connected to the second end of the first resistor at an output node. The apparatus further includes an inverting voltage buffer for substantially inverting the input voltage to generate an inverted input voltage. The apparatus further includes a transconductance buffer for receiving the inverted input voltage and for generating a current from a first end of the first capacitor to the output node having a magnitude equal to about the magnitude of the input voltage signal divided by the impedance of the first capacitor.
摘要翻译：提供了用于均衡的装置和方法。在一个实施例中，用于均衡输入电压的装置包括第一电容器和具有第一端和第二端的第一电阻器，第一端被配置为接收输入电压。该装置还包括第二电阻器，其具有在输出节点处电连接到第一电阻器的第二端的第一端。该装置还包括用于基本上反相输入电压以产生反相输入电压的反相电压缓冲器。该装置还包括跨导缓冲器，用于接收反相输入电压，并用于从第一电容器的第一端向输出节点产生电流，其大小等于输入电压信号的幅度除以第一电容器的阻抗电容器。

8. 发明授权

US06501327B1 Input bias current reduction circuit for multiple input stages having a common input 有权
标题翻译：具有公共输入的多个输入级的输入偏置电流降低电路
公开(公告)号：US06501327B1
公开(公告)日：2002-12-31
申请号：US09709177
申请日：2000-11-10
申请人： Kimo Tam
发明人： Kimo Tam
IPC分类号： G05F300
CPC分类号： G05F3/205 , G05F3/265
摘要： An input bias current reduction circuit for multiple input stages having a common input includes a plurality of input stages each including a first input transistor with its base connected to the common input and the first current sensing transistor with its collector-emitter in series with the collector-emitter of the first input transistor and its base current replicating that of the first transistor; and a current compensation circuit for sensing the base current of the first current sensing transistor in each input stage and subtracting that from the base current of the first input transistor in each input stage for maintaining constant reduced current loading of the input.
摘要翻译：用于具有公共输入的多个输入级的输入偏置电流降低电路包括多个输入级，每个输入级包括其基极连接到公共输入的第一输入晶体管和其集电极 - 发射极与集电极串联的第一电流感测晶体管 - 第一输入晶体管的发射极及其基极电流复制第一晶体管的基极电流; 以及电流补偿电路，用于感测每个输入级中的第一电流感测晶体管的基极电流，并从每个输入级中的第一输入晶体管的基极电流中减去，以保持输入的恒定减小的电流负载。

9. 发明授权

US08508286B2 Apparatus and method for electrical biasing 有权
标题翻译：用于电气偏置的装置和方法
公开(公告)号：US08508286B2
公开(公告)日：2013-08-13
申请号：US13586544
申请日：2012-08-15
申请人： Jennifer Lloyd , Kimo Tam
发明人： Jennifer Lloyd , Kimo Tam
IPC分类号： G05F1/10
CPC分类号： H03F1/30 , H03F1/0283 , H03F2200/18 , H03K19/0008
摘要： As provided herein, in some embodiments, power consumption and/or chip area is reduced by bias circuits configured to provide bias conditions for more than one active circuit, thereby reducing the number of bias circuits in a design. Shared bias circuits may reduce the aggregate amount of on-chip area utilized by bias circuitry and may also reduce the total power consumption of a chip. Additionally and/or alternatively, bias circuits disclosed herein are configured to provide outputs that are less susceptible to changes in the voltage supply level. In particular, in some embodiments, bias circuits are configured to provide relatively constant bias conditions despite changes in the voltage supply level. In some embodiments, bias circuits are configured to provide bias conditions that compensate for perturbations caused by changes other inputs, in order to stabilize a particular operating point.
摘要翻译：如本文所提供的，在一些实施例中，通过被配置为为多于一个有源电路提供偏置条件的偏置电路来降低功耗和/或芯片面积，从而减少设计中偏置电路的数量。共享偏置电路可以减少由偏置电路使用的片上区域的总量，并且还可以降低芯片的总功耗。附加地和/或替代地，本文公开的偏置电路被配置为提供对电压供应电平的变化较不敏感的输出。特别地，在一些实施例中，偏置电路被配置为提供相对恒定的偏置条件，尽管电压电平的变化。在一些实施例中，偏置电路被配置为提供补偿由改变其他输入引起的扰动的偏置条件，以便稳定特定的工作点。

10. 发明申请

US20120268204A1 APPARATUS AND METHOD FOR EQUALIZATION 有权
标题翻译：用于均衡的装置和方法
公开(公告)号：US20120268204A1
公开(公告)日：2012-10-25
申请号：US13093372
申请日：2011-04-25
申请人： Michael St. Germain , Jennifer Lloyd , Kimo Tam
发明人： Michael St. Germain , Jennifer Lloyd , Kimo Tam
IPC分类号： H03F3/45
CPC分类号： H03F3/4508 , H03F2203/45458 , H03F2203/45476 , H03F2203/45544 , H03F2203/45696 , H03F2203/45726
摘要： Apparatus and methods for equalization are provided. In one embodiment, an apparatus for equalizing an input voltage includes a first capacitor and a first resistor having a first end and a second end, the first end configured to receive the input voltage. The apparatus further includes a second resistor having a first end electrically connected to the second end of the first resistor at an output node. The apparatus further includes an inverting voltage buffer for substantially inverting the input voltage to generate an inverted input voltage. The apparatus further includes a transconductance buffer for receiving the inverted input voltage and for generating a current from a first end of the first capacitor to the output node having a magnitude equal to about the magnitude of the input voltage signal divided by the impedance of the first capacitor.
摘要翻译：提供了用于均衡的装置和方法。在一个实施例中，用于均衡输入电压的装置包括第一电容器和具有第一端和第二端的第一电阻器，第一端被配置为接收输入电压。该装置还包括第二电阻器，其具有在输出节点处电连接到第一电阻器的第二端的第一端。该装置还包括用于基本上反相输入电压以产生反相输入电压的反相电压缓冲器。该装置还包括跨导缓冲器，用于接收反相输入电压，并用于从第一电容器的第一端向输出节点产生电流，其大小等于输入电压信号的幅度除以第一电容器的阻抗电容器。

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