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    • 2. 发明授权
    • Arithmetic device and method with low power consumption
    • 具有低功耗的算术装置和方法
    • US06629119B1
    • 2003-09-30
    • US09452219
    • 1999-12-01
    • Oscal T. -C. ChenI-Ping HsuRuey-Liang Ma
    • Oscal T. -C. ChenI-Ping HsuRuey-Liang Ma
    • G06F752
    • G06F7/57G06F2207/3816
    • An arithmetic device with low power consumption includes master latches, a dynamic range detection unit, slave latches, an operation unit, and a word-length restoration unit. In the arithmetic device, the master latches latch a plurality of (such as two) input data. The dynamic range detection unit detects the effective dynamic range of these input data. The slave latches latch the values of the effective dynamic-range bits of these input data. The operation unit performs predetermined operations of the bits of these effective dynamic range to obtaing an operation result. Since the operation unit only performs operations of the bits of the effective dynamic range, the circuit corresponding to other bits will not demonstrate switching of power consumption, thereby lowering the overall power consumption. Furthermore, the word-length restoration unit will complement the operation result to its original output length in association with the sign of the operation result, for obtaining the correct operation result.
    • 具有低功耗的算术装置包括主锁存器,动态范围检测单元,从锁存器,操作单元和字长恢复单元。 在算术装置中,主锁存器锁存多个(如两个)输入数据。 动态范围检测单元检测这些输入数据的有效动态范围。 从锁存器锁存这些输入数据的有效动态范围位的值。 操作单元执行这些有效动态范围的位的预定操作以获得操作结果。 由于操作单元仅执行有效动态范围的位的操作,所以对应于其他位的电路将不会显示功耗的切换,从而降低总功耗。 此外,字长恢复单元将与操作结果的符号相关联的操作结果与其原始输出长度相匹配,以获得正确的操作结果。