专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20130153941A1 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE UNIT, ACTIVE MATRIX SUBSTRATE, LIQUID CRYSTAL PANEL, AND LIQUID CRYSTAL DISPLAY 有权
标题翻译：半导体器件，半导体器件单元，有源矩阵衬底，液晶面板和液晶显示器
公开(公告)号：US20130153941A1
公开(公告)日：2013-06-20
申请号：US13819822
申请日：2011-08-26
申请人： Osamu Sasaki , Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Osamu Sasaki , Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： H01L49/02 , H01L27/04 , H01L33/08
CPC分类号： H01L28/40 , G02F1/13454 , G02F1/136277 , G09G3/3611 , G09G3/3648 , G09G2310/0278 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , H01L27/04 , H01L27/1255 , H01L33/08
摘要： A semiconductor device (10) provided with at least a plurality of transistors and bootstrap capacitors (Ca1 and Cb1), the semiconductor device (10) includes: a semiconductor layer (22) made of the same material as a channel layer of each of the transistors; a capacitor electrode (24) formed in an upper layer of the semiconductor layer (22); and a clock signal line (17) formed in an upper layer of the capacitor electrode (24), the capacitor electrode (24) being connected to a gate electrode of each of the transistors, the clock signal line (17) being supplied with a clock signal (CK) from outside the semiconductor device (10), the capacitors (Ca1 and Cb1) each being formed in an overlap section where the semiconductor layer (22), the gate insulating film (23) and the capacitor electrode (24) overlap one another, the overlap section and the clock signal line (17) overlapping each other when viewed from above.
摘要翻译：设置有至少多个晶体管和自举电容器（Ca1和Cb1）的半导体器件（10），所述半导体器件（10）包括：由与所述半导体器件（10）的沟道层相同的材料制成的半导体层（22）晶体管形成在所述半导体层（22）的上层的电容电极（24）; 和形成在电容器电极（24）的上层的时钟信号线（17），电容电极（24）连接到每个晶体管的栅电极，时钟信号线（17）被提供有来自半导体器件（10）外部的时钟信号（CK），在半导体层（22），栅极绝缘膜（23）和电容器电极（24）的重叠部分中形成的电容器（Ca1和Cb1）彼此重叠，当从上方观看时，重叠部分和时钟信号线（17）彼此重叠。

2. 发明授权

US09076756B2 Semiconductor device, semiconductor device unit, active matrix substrate, liquid crystal panel, and liquid crystal display 有权
标题翻译：半导体器件，半导体器件单元，有源矩阵基板，液晶面板和液晶显示器
公开(公告)号：US09076756B2
公开(公告)日：2015-07-07
申请号：US13819822
申请日：2011-08-26
申请人： Osamu Sasaki , Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Osamu Sasaki , Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： H01L29/18 , H01L33/00 , H01L21/02 , H01L49/02 , G09G3/36 , H01L27/04 , H01L33/08 , H01L27/12 , G02F1/1345 , G02F1/1362
CPC分类号： H01L28/40 , G02F1/13454 , G02F1/136277 , G09G3/3611 , G09G3/3648 , G09G2310/0278 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , H01L27/04 , H01L27/1255 , H01L33/08
摘要： A semiconductor device (10) provided with at least a plurality of transistors and bootstrap capacitors (Ca1 and Cb1), the semiconductor device (10) includes: a semiconductor layer (22) made of the same material as a channel layer of each of the transistors; a capacitor electrode (24) formed in an upper layer of the semiconductor layer (22); and a clock signal line (17) formed in an upper layer of the capacitor electrode (24), the capacitor electrode (24) being connected to a gate electrode of each of the transistors, the clock signal line (17) being supplied with a clock signal (CK) from outside the semiconductor device (10), the capacitors (Ca1 and Cb1) each being formed in an overlap section where the semiconductor layer (22), the gate insulating film (23) and the capacitor electrode (24) overlap one another, the overlap section and the clock signal line (17) overlapping each other when viewed from above.
摘要翻译：设置有至少多个晶体管和自举电容器（Ca1和Cb1）的半导体器件（10），所述半导体器件（10）包括：由与所述半导体器件（10）的沟道层相同的材料制成的半导体层（22）晶体管形成在所述半导体层（22）的上层的电容电极（24）; 和形成在电容器电极（24）的上层的时钟信号线（17），电容电极（24）连接到每个晶体管的栅电极，时钟信号线（17）被提供有来自半导体器件（10）外部的时钟信号（CK），在半导体层（22），栅极绝缘膜（23）和电容器电极（24）的重叠部分中形成的电容器（Ca1和Cb1）彼此重叠，当从上方观察时，重叠部分和时钟信号线（17）彼此重叠。

3. 发明授权

US08779809B2 Signal processing circuit, inverter circuit, buffer circuit, level shifter, flip-flop, driver circuit, and display device 有权
标题翻译：信号处理电路，逆变电路，缓冲电路，电平转换器，触发器，驱动电路和显示装置
公开(公告)号：US08779809B2
公开(公告)日：2014-07-15
申请号：US13819400
申请日：2011-08-31
申请人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： H03K3/00
CPC分类号： H02J4/00 , H03K3/356008 , H03K3/356026 , H03K19/01714 , H03K19/01735 , Y10T307/50
摘要： A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; and an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal, the electric charge control section and the first output section being connected to each other via a relay section for either electrically connecting the electric charge control section and the first output section to each other or electrically blocking the electric charge control section and the first output section from each other, the electric charge control section including a resistor connected to a second power source. This configuration can increase reliability of a bootstrap-type signal processing circuit.
摘要翻译：本发明的信号处理电路包括：第一和第二输入端; 输出端子; 自举电容器; 与第二输入端子和输出端子连接的第一输出部分; 连接到第一输入端子的第二输出部分，第一电源和输出端子; 以及用于控制自举电容器的电荷的电荷控制部分，所述电荷控制部分连接到所述第一输入端子，所述电荷控制部分和所述第一输出部分经由继电器部分彼此连接，用于任一将电荷控制部和第一输出部彼此电连接，或者将电荷控制部和第一输出部彼此电阻塞，电荷控制部包括与第二电源连接的电阻。该配置可以增加自举式信号处理电路的可靠性。

4. 发明授权

US08736534B2 Active matrix liquid crystal display device and method of driving the same 有权
标题翻译：有源矩阵液晶显示装置及其驱动方法
公开(公告)号：US08736534B2
公开(公告)日：2014-05-27
申请号：US11922491
申请日：2006-07-11
申请人： Etsuo Yamamoto , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten
发明人： Etsuo Yamamoto , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3688 , G09G2310/0245 , G09G2330/02 , G09G2330/027
摘要： In one embodiment of the present invention, on each source bus line, an electric charge escaping transistor is provided having the same polarity as a pixel transistor and having a gate to which a turn-off voltage signal of the pixel transistor is supplied. When an active matrix liquid crystal display device is powered off, the turn-off voltage signal is made to reach the GND level before a turn-on voltage signal of the pixel transistor reaches the GND level, so that the pixel transistor and the electric charge escaping transistor are made half-open. This lets electric charges accumulated in the pixel escape to a common electrode TCOM.
摘要翻译：在本发明的一个实施例中，在每个源极总线上，设置电荷逸出晶体管，其具有与像素晶体管相同的极性，并且具有提供像素晶体管的关断电压信号的栅极。当有源矩阵液晶显示装置断电时，在像素晶体管的导通电压信号达到GND电平之前，使关断电压信号达到GND电平，使得像素晶体管和电荷逃逸晶体管制成半开放。这使得在像素中累积的电荷逃逸到公共电极TCOM。

5. 发明申请

US20130194033A1 SIGNAL PROCESSING CIRCUIT, INVERTER CIRCUIT, BUFFER CIRCUIT, DRIVER CIRCUIT, LEVEL SHIFTER, AND DISPLAY DEVICE 有权
标题翻译：信号处理电路，逆变器电路，缓冲电路，驱动电路，电平变换器和显示装置
公开(公告)号：US20130194033A1
公开(公告)日：2013-08-01
申请号：US13819043
申请日：2011-08-31
申请人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： G05F3/16
CPC分类号： G05F3/16 , G09G3/3674 , G09G2310/0286 , G09G2310/0291 , H04L25/0272
摘要： A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal; and a resistor having (i) a first end connected to the output terminal and (ii) a second end connected to a second power source. This arrangement allows the signal processing circuit to maintain an output potential even after a bootstrap effect has worn off.
摘要翻译：本发明的信号处理电路包括：第一和第二输入端; 输出端子; 自举电容器; 与第二输入端子和输出端子连接的第一输出部分; 连接到第一输入端子的第二输出部分，第一电源和输出端子; 用于控制所述自举电容器的电荷的电荷控制部分，所述电荷控制部分连接到所述第一输入端子; 以及电阻器，其具有（i）连接到所述输出端子的第一端和（ii）连接到第二电源的第二端。这种布置允许信号处理电路即使在自举效应已经磨损之后仍然保持输出电位。

6. 发明申请

US20130169319A1 SIGNAL PROCESSING CIRCUIT, DRIVER CIRCUIT, AND DISPLAY DEVICE 有权
标题翻译：信号处理电路，驱动电路和显示装置
公开(公告)号：US20130169319A1
公开(公告)日：2013-07-04
申请号：US13819827
申请日：2011-08-31
申请人： Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
发明人： Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
IPC分类号： H03K17/00
CPC分类号： H03K17/005 , G09G3/3677 , G09G2310/0286 , G09G2310/08 , G11C19/184 , G11C19/28 , H03K19/00315
摘要： A signal processing circuit of the present invention includes: a first input terminal; a second input terminal; a third input terminal; a first node; a second node; an output terminal; a resistor; a first signal generating section which (i) is connected to the first node, a third input terminal, and the output terminal and (ii) includes a bootstrap capacitor; and a second signal generating section which is connected to the second node, a first power supply, and the output terminal. The first node becomes active in a case where the first input terminal becomes active. The second node becomes active in a case where the second input terminal becomes active. The output terminal is connected to the first power supply via the resistor. With the configuration, it is possible to have an improvement in operational stability of the signal processing circuit.
摘要翻译：本发明的信号处理电路包括：第一输入端; 第二输入端; 第三输入端; 第一个节点; 第二个节点; 输出端子; 一个电阻; （i）连接到第一节点的第一信号产生部分，第三输入端子和输出端子，以及（ii）包括自举电容器; 以及连接到第二节点的第二信号产生部分，第一电源和输出端子。在第一输入端子变为活动状态的情况下，第一节点变为活动状态。在第二输入端子变为活动状态的情况下，第二节点变为活动状态。输出端子通过电阻连接到第一个电源。利用该配置，可以改善信号处理电路的操作稳定性。

7. 发明申请

US20100309184A1 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE 有权
标题翻译：半导体器件和显示器件
公开(公告)号：US20100309184A1
公开(公告)日：2010-12-09
申请号：US12734595
申请日：2008-08-20
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta
IPC分类号： G09G5/00 , H01L25/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0289 , G11C19/28 , H01L27/124 , H03K17/161 , H03K17/162 , H03K17/687
摘要： A circuit which is constituted by a plurality of n-channel transistors includes, in at least one embodiment, a transistor (T1) which has a drain terminal to which an input signal is supplied and a source terminal from which a output signal is supplied; and a transistor (T2) which has a drain terminal to which a control signal is supplied and a source terminal connected to a gate terminal of the transistor (T1). A gate terminal of the transistor (T2) is connected to the source terminal of the transistor (T2). With the arrangement, it is possible to provide (i) a semiconductor device which is constituted by transistors having an identical conductivity type and which is capable of reducing an influence of noise, and (ii) a display device including the semiconductor device.
摘要翻译：在至少一个实施例中，由多个n沟道晶体管构成的电路包括具有供给输入信号的漏极端子和提供输出信号的源极端子的晶体管（T1）; 以及具有提供控制信号的漏极端子和与晶体管（T1）的栅极端子连接的源极端子的晶体管（T2）。晶体管（T2）的栅极端子连接到晶体管（T2）的源极端子。通过该结构，可以提供（i）由具有相同导电类型并能够减小噪声影响的晶体管构成的半导体器件，以及（ii）包括半导体器件的显示器件。

8. 发明申请

US20120169751A1 DISPLAY APPARATUS AND DISPLAY APPARATUS DRIVING METHOD 有权
标题翻译：显示设备和显示设备驱动方法
公开(公告)号：US20120169751A1
公开(公告)日：2012-07-05
申请号：US13395681
申请日：2010-05-18
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G06F3/038 , G09G5/39
CPC分类号： G09G3/3648 , G02F1/13624 , G09G3/3614 , G09G2300/0857 , G09G2310/08 , G09G2320/0219 , G09G2330/021
摘要： In an active matrix display apparatus including: pixels provided in a matrix pattern, the pixels each including a memory circuit which retains data while refreshing the data, a data signal electric potential which is supplied from a source line in a period t1 and written to a node which is connected to a liquid capacitor is higher than a data electric potential of the node, the data electric potential being obtained in a period t14 after a refresh operation of the memory circuit.
摘要翻译：在一种有源矩阵显示装置中，包括以矩阵模式提供的像素，每个像素包括一个在刷新数据的同时保留数据的存储电路，在时间段t1内从源极线提供的数据信号电位被写入到连接到液体电容器的节点高于节点的数据电位，在存储器电路的刷新操作之后的周期t14中获得数据电位。

9. 发明申请

US20090085902A1 Active Matrix Liquid Crystal Display Device and Method of Driving the Same 有权
标题翻译：有源矩阵液晶显示装置及其驱动方法
公开(公告)号：US20090085902A1
公开(公告)日：2009-04-02
申请号：US11922491
申请日：2006-07-11
申请人： Etsuo Yamamoto , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten
发明人： Etsuo Yamamoto , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten
IPC分类号： G09G3/36 , G02F1/136 , G06F3/038
CPC分类号： G09G3/3648 , G09G3/3688 , G09G2310/0245 , G09G2330/02 , G09G2330/027
摘要： In one embodiment of the present invention, on each source bus line, an electric charge escaping transistor is provided having the same polarity as a pixel transistor and having a gate to which a turn-off voltage signal of the pixel transistor is supplied. When an active matrix liquid crystal display device is powered off, the turn-off voltage signal is made to reach the GND level before a turn-on voltage signal of the pixel transistor reaches the GND level, so that the pixel transistor and the electric charge escaping transistor are made half-open. This lets electric charges accumulated in the pixel escape to a common electrode TCOM.
摘要翻译：在本发明的一个实施例中，在每个源极总线上，设置电荷逸出晶体管，其具有与像素晶体管相同的极性，并且具有提供像素晶体管的截止电压信号的栅极。当有源矩阵液晶显示装置断电时，在像素晶体管的导通电压信号达到GND电平之前，使关断电压信号达到GND电平，使得像素晶体管和电荷逃逸晶体管制成半开放。这使得在像素中累积的电荷逃逸到公共电极TCOM。

10. 发明授权

US09024681B2 Signal processing circuit, inverter circuit, buffer circuit, driver circuit, level shifter, and display device 有权
标题翻译：信号处理电路，逆变电路，缓冲电路，驱动电路，电平转换器和显示装置
公开(公告)号：US09024681B2
公开(公告)日：2015-05-05
申请号：US13819043
申请日：2011-08-31
申请人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： G05F1/10 , G05F3/16 , H04L25/02 , G09G3/36
CPC分类号： G05F3/16 , G09G3/3674 , G09G2310/0286 , G09G2310/0291 , H04L25/0272
摘要： A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal; and a resistor having (i) a first end connected to the output terminal and (ii) a second end connected to a second power source. This arrangement allows the signal processing circuit to maintain an output potential even after a bootstrap effect has worn off.
摘要翻译：本发明的信号处理电路包括：第一和第二输入端; 输出端子; 自举电容器; 与第二输入端子和输出端子连接的第一输出部分; 连接到第一输入端子的第二输出部分，第一电源和输出端子; 用于控制所述自举电容器的电荷的电荷控制部分，所述电荷控制部分连接到所述第一输入端子; 以及电阻器，其具有（i）连接到所述输出端子的第一端和（ii）连接到第二电源的第二端。这种布置允许信号处理电路即使在自举效应已经磨损之后仍然保持输出电位。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式