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1. 发明授权

US07388534B2 Adaptive data acquisition for an imaging system 有权
标题翻译：成像系统的自适应数据采集
公开(公告)号：US07388534B2
公开(公告)日：2008-06-17
申请号：US11458713
申请日：2006-07-20
申请人： Oliver Richard Astley , John Eric Tkaczyk , Naresh Kesavan Rao , James Walter LeBlanc , Wen Li , Yanfeng Du
发明人： Oliver Richard Astley , John Eric Tkaczyk , Naresh Kesavan Rao , James Walter LeBlanc , Wen Li , Yanfeng Du
IPC分类号： H03M1/12
CPC分类号： G01T1/17
摘要： An adaptive data acquisition circuit (26) includes an amplifier (14) for amplifying electrical pulses generated by a detector (12) responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit (28) for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit (30) for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal (34) responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.
摘要翻译：自适应数据采集电路（26）包括放大器（14），用于响应于在检测器处入射的能量放大由检测器（12）产生的电脉冲。自适应数据采集电路还包括用于对由放大器产生的放大电脉冲进行计数的计数电路（28）。另外，自适应数据采集电路包括数字逻辑电路（30），用于确定指示放大的电脉冲中存在的脉冲速率和能量的脉冲参数，并产生响应脉冲的控制信号（34）用于控制数据采集电路的工作参数的参数。

2. 发明申请

US20080018505A1 ADAPTIVE DATA ACQUISITION FOR AN IMAGING SYSTEM 有权
标题翻译：用于成像系统的自适应数据采集
公开(公告)号：US20080018505A1
公开(公告)日：2008-01-24
申请号：US11458713
申请日：2006-07-20
申请人： Oliver Richard Astley , John Eric Tkaczyk , Naresh Kesavan Rao , James Walter LeBlanc , Wen Li , Yanfeng Du
发明人： Oliver Richard Astley , John Eric Tkaczyk , Naresh Kesavan Rao , James Walter LeBlanc , Wen Li , Yanfeng Du
IPC分类号： H03M7/34
CPC分类号： G01T1/17
摘要： An adaptive data acquisition circuit (26) includes an amplifier (14) for amplifying electrical pulses generated by a detector (12) responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit (28) for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit (30) for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal (34) responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.
摘要翻译：自适应数据采集电路（26）包括放大器（14），用于响应于在检测器处入射的能量放大由检测器（12）产生的电脉冲。自适应数据采集电路还包括用于对由放大器产生的放大电脉冲进行计数的计数电路（28）。另外，自适应数据采集电路包括数字逻辑电路（30），用于确定指示放大的电脉冲中存在的脉冲速率和能量的脉冲参数，并产生响应脉冲的控制信号（34）用于控制数据采集电路的工作参数的参数。

3. 发明申请

US20080001095A1 ADAPTIVE IMAGING SYSTEM 审中-公开
标题翻译：自适应成像系统
公开(公告)号：US20080001095A1
公开(公告)日：2008-01-03
申请号：US11427534
申请日：2006-06-29
申请人： Oliver Richard Astley , John Eric Tkaczyk , Naresh Kesavan Rao , James Walter LeBlanc , Wen Li , Yanfeng Du
发明人： Oliver Richard Astley , John Eric Tkaczyk , Naresh Kesavan Rao , James Walter LeBlanc , Wen Li , Yanfeng Du
IPC分类号： G01T1/16
CPC分类号： G01T1/17 , G01T1/2985
摘要： An adaptive imaging system includes a detector receiving energy transmitted through a target and generating electrical charge pulses at a pulse rate indicative of an intensity of received energy. The system also includes a switch for selectively coupling the charge pulses from one or more pixel elements of the detector to a charge pulse counter for counting the charge pulses and a charge pulse integrator for integrating the charge pulses. In addition, the system includes a prediction module for predicting a charge pulse rate expected to be produced by the detector and for operating the switch to selectively couple the charge pulses to the counter and the integrator responsive to a predicted charge pulse rate.
摘要翻译：自适应成像系统包括检测器，其接收通过目标传输的能量，并以指示接收能量的强度的脉冲速率产生电荷脉冲。该系统还包括用于选择性地将来自检测器的一个或多个像素元件的充电脉冲耦合到用于计数充电脉冲的充电脉冲计数器和用于积分充电脉冲的充电脉冲积分器的开关。此外，该系统包括预测模块，用于预测由检测器产生的充电脉冲速率，并且用于操作开关以根据预测的充电脉冲速率选择性地将充电脉冲耦合到计数器和积分器。

4. 发明授权

US07936299B2 Capacitive integrate and fold charge-to-digital converter 有权
标题翻译：电容集成和折叠电荷数字转换器
公开(公告)号：US07936299B2
公开(公告)日：2011-05-03
申请号：US12495794
申请日：2009-06-30
申请人： Oliver Richard Astley , Naresh Kesavan Rao , Feng Chen
发明人： Oliver Richard Astley , Naresh Kesavan Rao , Feng Chen
IPC分类号： H03M1/12
CPC分类号： H03M1/141 , H03M1/56 , H03M1/60
摘要： A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.
摘要翻译：用于将充电信号转换为二进制格式的输出位的电路包括：积分电路，包括具有反相输入端和输出端的运算跨导放大器，连接在反相输入端和输出端之间的积分电容器，积分电路用于存储由传感器二极管选择性地提供的电荷输入的电容器; 以及具有折叠电容器的折叠电路，所述折叠电容器经由用于将所述折叠电容器充电至预定折叠电荷值的折叠缓冲器可折叠地耦合到折叠电压源，或者用于选择性地移除所述折叠电容器的至少一部分存储电荷输入。

5. 发明申请

US20100328131A1 Capacitive Integrate and Fold Charge-to-Digital Converter 有权
标题翻译：电容集成和折叠电荷数字转换器
公开(公告)号：US20100328131A1
公开(公告)日：2010-12-30
申请号：US12495794
申请日：2009-06-30
申请人： Oliver Richard Astley , Naresh Kesavan Rao , Feng Chen
发明人： Oliver Richard Astley , Naresh Kesavan Rao , Feng Chen
IPC分类号： H03M1/12
CPC分类号： H03M1/141 , H03M1/56 , H03M1/60
摘要： A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.
摘要翻译：用于将充电信号转换为二进制格式的输出位的电路包括：积分电路，包括具有反相输入端和输出端的运算跨导放大器，连接在反相输入端和输出端之间的积分电容器，积分电路用于存储由传感器二极管选择性地提供的电荷输入的电容器; 以及具有折叠电容器的折叠电路，所述折叠电容器经由用于将所述折叠电容器充电至预定折叠电荷值的折叠缓冲器可折叠地耦合到折叠电压源，或者用于选择性地移除所述折叠电容器的至少一部分存储电荷输入。

6. 发明授权

US07095354B2 Very linear wide-range pipelined charge-to-digital converter 有权
标题翻译：非常线性的大范围流水线电荷数字转换器
公开(公告)号：US07095354B2
公开(公告)日：2006-08-22
申请号：US11203493
申请日：2005-08-12
申请人： Daniel David Harrison , Naresh Kesavan Rao , Shobhana Mani , Naveen Stephan Chandra , Oliver Richard Astley , Donald Thomas McGrath
发明人： Daniel David Harrison , Naresh Kesavan Rao , Shobhana Mani , Naveen Stephan Chandra , Oliver Richard Astley , Donald Thomas McGrath
IPC分类号： H03M1/36
CPC分类号： H03M1/0609 , H03M1/1215 , H03M1/141 , H03M1/60
摘要： A multi-channel analog to digital conversion circuit and methods thereon are provided. The multi-channel analog to digital conversion cirucit comprises a plurality of linearized channels wherein each channel comprises a multi-stage pipelined charge-to-digital converter and an integrating capacitor within each stage of the multi-stage converter wherein analog residue is processed by subsequent analog to digital converter stages. Each stage of respective linearized channels is configured for calculating gain and offset for each stage in the channel and such gain and offset is used in subsequent integration periods.
摘要翻译：提供了多通道模数转换电路及其方法。多通道模数转换电路包括多个线性化通道，其中每个通道包括多级流水线电荷数字转换器和在多级转换器的每个级内的积分电容器，其中模拟残余物由后续处理模数转换器级。各个线性化信道的每个级被配置为用于计算信道中每个级的增益和偏移，并且在随后的积分周期中使用这种增益和偏移。

7. 发明申请

US20130319759A1 FINE-PITCH FLEXIBLE WIRING 审中-公开
标题翻译：精细接线灵活接线
公开(公告)号：US20130319759A1
公开(公告)日：2013-12-05
申请号：US13485526
申请日：2012-05-31
申请人： James Wilson Rose , Kaustubh Ravindra Nagarkar , Craig Patrick Galligan , Binoy Milan Shah , Oliver Richard Astley
发明人： James Wilson Rose , Kaustubh Ravindra Nagarkar , Craig Patrick Galligan , Binoy Milan Shah , Oliver Richard Astley
IPC分类号： H02G15/02 , H01B13/00
CPC分类号： H01L24/43 , H01L24/46 , H01L2224/43 , H01L2224/45014 , H01L2224/85207 , H01L2924/00014 , H01L2924/07802 , H01L2924/12042 , H05K1/118 , H05K2203/0235 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/206
摘要： A flexible wire assembly includes a plurality of elongated conductors and insulators each having a quadrilateral cross section and alternatingly laminated together, the flexible wire assembly having a wire width measured across the conductor and insulators, a wire height equivalent to the height of the conductors and insulators, and a wire length which is measured in a longitudinal direction orthogonal to the wire width and the wire height, wherein the wire length is one or more orders of magnitude greater than the wire width and the wire height; and a first device comprising a plurality of bond pads spaced to define a bond pad pitch, wherein the flexible wire assembly is coupled to the first device at the bond pads such that spacing of the conductor conductors is matched to the bond pad pitch.
摘要翻译：柔性线组件包括多个细长导体和绝缘体，每个细长导体和绝缘体具有四边形横截面并交替层压在一起，柔性线组件具有跨导体和绝缘体测量的导线宽度，线高度等于导体和绝缘体的高度以及在与线宽度和线高度正交的纵向方向上测量的线长度，其中线长度比线宽和线高度大一个或多个数量级; 以及包括间隔开以限定接合焊盘间距的多个接合焊盘的第一器件，其中所述柔性线组件在所述接合焊盘处耦合到所述第一器件，使得所述导体导体的间隔与所述接合焊盘间距匹配。

8. 发明授权

US08492762B2 Electrical interface for a sensor array 有权
标题翻译：传感器阵列的电气接口
公开(公告)号：US08492762B2
公开(公告)日：2013-07-23
申请号：US11426617
申请日：2006-06-27
申请人： James Wilson Rose , Kevin Matthew Durocher , Donna Marie Sherman , Oliver Richard Astley
发明人： James Wilson Rose , Kevin Matthew Durocher , Donna Marie Sherman , Oliver Richard Astley
IPC分类号： H01L23/58
CPC分类号： H04N5/335 , A61B6/032 , A61B6/107 , A61B6/4233 , H04N5/2253 , H04N5/378
摘要： An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package may provide a plurality of interfaces for interconnecting to an integrated circuit in the package a plurality of signals from the sensor array and having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.
摘要翻译：提供了一种用于传感器阵列的接口电路。接口电路可以由提供第一区域和第二区域的集成电路封装构成。第一区域可以间隔开并且与包装的第二区域相对。封装的第一区域可以提供多个接口，用于将封装中的集成电路互连到来自传感器阵列的多个信号，并具有第一电特性，例如模拟和测试信号。封装的第二区域可以提供多个接口，用于将具有不同于第一特性的至少一个电特性的多个信号（例如功率和操作数字信号）互连到集成电路。

9. 发明授权

US08041003B2 Electronic packaging technique to improve sensor failure robustness 有权
标题翻译：电子封装技术，提高传感器故障的鲁棒性
公开(公告)号：US08041003B2
公开(公告)日：2011-10-18
申请号：US12551355
申请日：2009-08-31
申请人： Oliver Richard Astley , Naveen Chandra , James Rose
发明人： Oliver Richard Astley , Naveen Chandra , James Rose
IPC分类号： H05G1/60
CPC分类号： G01N23/046 , G01N2223/419
摘要： A modular sensor assembly comprises: sensor arrays electrically coupled to a sensor substrate; a plurality of integrated circuits with sensor signal processors electrically coupled to a package substrate; and an interconnect assembly including electrical paths configured to electrically couple analog output signals from a first sensor array to a first integrated circuit and from a second sensor to a second integrated circuit, the first sensor disposed adjacent to the second sensor.
摘要翻译：模块化传感器组件包括：电耦合到传感器基板的传感器阵列; 具有电耦合到封装衬底的传感器信号处理器的多个集成电路; 以及互连组件，其包括被配置为将来自第一传感器阵列的模拟输出信号电耦合到第一集成电路并且从第二传感器电耦合到第二集成电路的电路径，所述第一传感器邻近所述第二传感器设置。

10. 发明申请

US20080068815A1 Interface Assembly And Method for Integrating A Data Acquisition System on a Sensor Array 审中-公开
标题翻译：用于在传感器阵列上集成数据采集系统的接口组装和方法
公开(公告)号：US20080068815A1
公开(公告)日：2008-03-20
申请号：US11532567
申请日：2006-09-18
申请人： Oliver Richard Astley , James Wilson Rose
发明人： Oliver Richard Astley , James Wilson Rose
IPC分类号： H05K7/00
CPC分类号： A61B6/032
摘要： An interface assembly for a sensor array is provided. The interface assembly may be made up of an integrated circuit package mounted on the sensor array. The package provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package supportingly adjoins the sensor array and provides a plurality of interfaces for interconnecting to at least one integrated circuit in the package a plurality of signals from the sensor array having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.
摘要翻译：提供了一种用于传感器阵列的接口组件。接口组件可以由安装在传感器阵列上的集成电路封装构成。该包装提供第一区域和第二区域。第一区域可以间隔开并且与包装的第二区域相对。所述封装的第一区域支撑地邻接所述传感器阵列并且提供多个接口，用于将所述封装中的至少一个集成电路互连到具有诸如模拟和测试信号的第一电特性的所述传感器阵列的多个信号。封装的第二区域可以提供多个接口，用于将具有不同于第一特性的至少一个电特性的多个信号（例如功率和操作数字信号）互连到集成电路。

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