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    • 4. 发明申请
    • Semiconductor device and method of fabricating the same
    • 半导体装置及其制造方法
    • US20070262353A1
    • 2007-11-15
    • US11790517
    • 2007-04-26
    • Nobuyasu NishiyamaKatsunori Yahashi
    • Nobuyasu NishiyamaKatsunori Yahashi
    • H01L29/76H01L29/745
    • H01L29/785H01L29/66818H01L29/78687
    • A semiconductor device according to an embodiment of the present invention includes: a square pole-shaped channel portion made from a first semiconductor layer formed on a substrate, and surrounded with four side faces; a gate electrode formed on a first side face of the channel portion, and a second side face of the channel portion opposite to the first side face through respective gate insulating films; a source region having a conductivity type different from that of the channel portion and being formed on a third side face of the channel portion, the source region including a second semiconductor layer having a lattice constant different from that of the first semiconductor layer and being formed directly on the substrate; and a drain region having a conductivity type different from that of the channel portion and being formed on a fourth side face of the channel portion opposite to the third side face, the drain region including the second semiconductor layer being formed directly on the substrate.
    • 根据本发明的实施例的半导体器件包括:由形成在衬底上并被四个侧面包围的第一半导体层制成的方形极形沟道部分; 形成在所述沟道部分的第一侧面上的栅极电极和通过各个栅极绝缘膜的所述沟道部分与所述第一侧面相对的第二侧面; 源极区,其具有不同于沟道部分的导电类型并形成在沟道部分的第三侧面上的源极区,源极区包括具有与第一半导体层的晶格常数不同的晶格常数的第二半导体层,并形成 直接在基材上; 以及漏极区,其具有与沟道部分不同的导电类型,并且形成在与第三侧面相对的沟道部分的第四侧面上,包括第二半导体层的漏极区域直接形成在衬底上。
    • 5. 发明授权
    • Power supply control device, plasma processing device, and plasma processing method
    • 电源控制装置,等离子体处理装置和等离子体处理方法
    • US08760053B2
    • 2014-06-24
    • US13198356
    • 2011-08-04
    • Hideo EtoNobuyasu NishiyamaMakoto SaitoKeiji Suzuki
    • Hideo EtoNobuyasu NishiyamaMakoto SaitoKeiji Suzuki
    • H05B31/26H03H7/38
    • H01J37/32091H01J37/32183H01J37/32935
    • According to one embodiment, a power supply control device of a plasma processing device having a plasma generation unit which generates plasma in a process chamber. The power supply control device includes a radio frequency power supply, a storage unit, and a matching circuit. The radio frequency power supply supplies a power to the plasma generation unit. The storage unit stores matching information including a first matching value, a second process condition, and a third matching value. The first matching value corresponds to process information of a first process condition. The second matching value corresponds to process information of a second process condition. The third matching value corresponds to process information of a transient state where the first process condition is being switched to the second process condition. The matching circuit matches impedances based on the matching information.
    • 根据一个实施例,一种具有在处理室中产生等离子体的等离子体产生单元的等离子体处理装置的电源控制装置。 电源控制装置包括射频电源,存储单元和匹配电路。 射频电源为等离子体发生单元供电。 存储单元存储包括第一匹配值,第二处理条件和第三匹配值的匹配信息。 第一匹配值对应于第一处理条件的处理信息。 第二匹配值对应于第二处理条件的处理信息。 第三匹配值对应于将第一处理条件切换到第二处理条件的过渡状态的处理信息。 匹配电路根据匹配信息匹配阻抗。
    • 7. 发明申请
    • POWER SUPPLY CONTROL DEVICE, PLASMA PROCESSING DEVICE, AND PLASMA PROCESSING METHOD
    • 电源控制装置,等离子体处理装置和等离子体处理方法
    • US20120038277A1
    • 2012-02-16
    • US13198356
    • 2011-08-04
    • Hideo ETONobuyasu NishiyamaMakoto SaitoKeiji Suzuki
    • Hideo ETONobuyasu NishiyamaMakoto SaitoKeiji Suzuki
    • H05B31/02H01L21/3065
    • H01J37/32091H01J37/32183H01J37/32935
    • According to one embodiment, a power supply control device of a plasma processing device having a plasma generation unit which generates plasma in a process chamber. The power supply control device includes a radio frequency power supply, a storage unit, and a matching circuit. The radio frequency power supply supplies a power to the plasma generation unit. The storage unit stores matching information including a first matching value, a second process condition, and a third matching value. The first matching value corresponds to process information of a first process condition. The second matching value corresponds to process information of a second process condition. The third matching value corresponds to process information of a transient state where the first process condition is being switched to the second process condition. The matching circuit matches impedances based on the matching information.
    • 根据一个实施例,一种具有在处理室中产生等离子体的等离子体产生单元的等离子体处理装置的电源控制装置。 电源控制装置包括射频电源,存储单元和匹配电路。 射频电源为等离子体发生单元供电。 存储单元存储包括第一匹配值,第二处理条件和第三匹配值的匹配信息。 第一匹配值对应于第一处理条件的处理信息。 第二匹配值对应于第二处理条件的处理信息。 第三匹配值对应于将第一处理条件切换到第二处理条件的过渡状态的处理信息。 匹配电路根据匹配信息匹配阻抗。
    • 8. 发明授权
    • Semiconductor device and a manufacturing method thereof
    • 半导体装置及其制造方法
    • US08036036B2
    • 2011-10-11
    • US12574438
    • 2009-10-06
    • Nobuyasu Nishiyama
    • Nobuyasu Nishiyama
    • G11C16/04
    • H01L27/105H01L27/0207H01L27/1052H01L27/112H01L27/11286H01L27/115H01L27/11524
    • A semiconductor device includes at least two adjacent memory cell blocks, each of the memory cell blocks having a plurality of memory cell units, each of memory cell units having a plurality of electrically reprogrammable and erasable memory cells connected in series, a plurality of cell gates for selecting the plurality of memory cells within the two adjacent memory cell blocks, each of the plurality of cell gates being formed with roughly rectangular closed loops or roughly U shaped open loops, each of the loops being connected to a corresponding cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within one of the two adjacent memory cell blocks and being connected to a corresponding memory cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within the other memory cell block of the two adjacent memory cell blocks and a plurality of pairs of first and second selection gates for selecting the memory cell block, the plurality of cell gates being located between one pair of the first and second selection gates within a corresponding block of the memory cell block.
    • 半导体器件包括至少两个相邻的存储器单元块,每个存储器单元块具有多个存储单元单元,每个存储单元单元具有串联连接的多个电可重新编程和可擦除存储单元,多个单元门 为了选择两个相邻的存储单元块内的多个存储器单元,多个单元栅极中的每一个形成有大致矩形的闭环或大致U形的开环,每个循环连接到存储单元的相应单元 在两个相邻存储单元块之一内的多个存储单元单元的相应存储单元单元中,并连接到另一个存储单元块内的多个存储单元单元的相应存储单元单元中的存储单元的对应存储单元 两个相邻的存储单元块的存储单元块和用于选择th的多对第一和第二选择门 e个存储器单元块,所述多个单元栅极位于所述存储单元块的对应块内的一对第一和第二选择栅极之间。
    • 9. 发明申请
    • Semiconductor device and method of fabricating the same
    • 半导体装置及其制造方法
    • US20100151645A1
    • 2010-06-17
    • US12656767
    • 2010-02-16
    • Nobuyasu NishiyamaKatsunori Yahashi
    • Nobuyasu NishiyamaKatsunori Yahashi
    • H01L21/336
    • H01L29/785H01L29/66818H01L29/78687
    • A semiconductor device according to an embodiment of the present invention includes: a square pole-shaped channel portion made from a first semiconductor layer formed on a substrate, and surrounded with four side faces; a gate electrode formed on a first side face of the channel portion, and a second side face of the channel portion opposite to the first side face through respective gate insulating films; a source region having a conductivity type different from that of the channel portion and being formed on a third side face of the channel portion, the source region including a second semiconductor layer having a lattice constant different from that of the first semiconductor layer and being formed directly on the substrate; and a drain region having a conductivity type different from that of the channel portion and being formed on a fourth side face of the channel portion opposite to the third side face, the drain region including the second semiconductor layer being formed directly on the substrate.
    • 根据本发明的实施例的半导体器件包括:由形成在衬底上并被四个侧面包围的第一半导体层制成的方形极形沟道部分; 形成在所述沟道部分的第一侧面上的栅极电极和通过各个栅极绝缘膜的所述沟道部分与所述第一侧面相对的第二侧面; 源极区,其具有不同于沟道部分的导电类型并形成在沟道部分的第三侧面上的源极区,源极区包括具有与第一半导体层的晶格常数不同的晶格常数的第二半导体层,并形成 直接在基材上; 以及漏极区,其具有与沟道部分不同的导电类型,并且形成在与第三侧面相对的沟道部分的第四侧面上,包括第二半导体层的漏极区域直接形成在衬底上。
    • 10. 发明申请
    • PLASMA TREATMENT APPARATUS AND PLASMA TREATMENT METHOD
    • 等离子体处理装置和等离子体处理方法
    • US20120000887A1
    • 2012-01-05
    • US13171990
    • 2011-06-29
    • Hideo EtoMakoto SaitoKeiji SuzukiNobuyasu Nishiyama
    • Hideo EtoMakoto SaitoKeiji SuzukiNobuyasu Nishiyama
    • C23F1/00C23F1/08
    • H01J37/321H01J37/32183H01J37/32935
    • According to one embodiment, there is provided a plasma treatment apparatus including an electrode, a first power supply circuit, a plasma generating unit, a second power supply circuit, a sensing unit, and a control unit. The electrode is arranged inside a treatment chamber. On the electrode, a substrate to be treated is placed. The first power supply circuit supplies power to the electrode. The plasma generating unit generates plasma in a space separated from the electrode inside the treatment chamber. The second power supply circuit supplies power to the plasma generating unit. The sensing unit senses a parameter output from the first power supply circuit. The control unit controls power supplied from the second power supply circuit so that the parameter sensed by the sensing unit becomes close to or substantially equal to a target value.
    • 根据一个实施例,提供了一种等离子体处理装置,其包括电极,第一电源电路,等离子体产生单元,第二电源电路,感测单元和控制单元。 电极设置在处理室内。 在电极上放置待处理的基板。 第一电源电路为电极供电。 等离子体生成单元在与处理室内部的电极分离的空间中产生等离子体。 第二电源电路向等离子体发生单元供电。 感测单元感测从第一电源电路输出的参数。 控制单元控制从第二电源电路提供的电力,使得由感测单元感测的参数变得接近或基本上等于目标值。