专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5103167A Integrated circuit device provided with test mode function 失效
标题翻译：具有测试模式功能的集成电路设备
公开(公告)号：US5103167A
公开(公告)日：1992-04-07
申请号：US571852
申请日：1990-08-24
申请人： Nobuhiro Okano , Hiroshi Uemura , Eiji Ogino
发明人： Nobuhiro Okano , Hiroshi Uemura , Eiji Ogino
IPC分类号： G01R31/28 , G01R31/317 , G06F11/22 , G06F15/78 , H01L21/822 , H01L27/04
CPC分类号： G01R31/31701
摘要： An integrated circuit device provided with test mode function has a plurality of terminals used for receiving and/or feeding out signals during a normal operation of the device. At least one terminal of the plurality of terminals are connected to a register for storing test mode setting data applied through the at least one terminal during a reset cycle period of the device. In accordance with the test mode setting data stored in the register, a setting of a predetermined test mode of the device is executed.
摘要翻译：设置有测试模式功能的集成电路器件具有用于在器件的正常操作期间接收和/或馈送信号的多个端子。多个终端中的至少一个终端连接到用于存储在设备的复位周期期间通过至少一个终端应用的测试模式设置数据的寄存器。根据存储在寄存器中的测试模式设置数据，执行设备的预定测试模式的设置。

2. 发明授权

US5164874A Apparatus for protecting against overvoltage 失效
标题翻译：用于防止过电压的装置
公开(公告)号：US5164874A
公开(公告)日：1992-11-17
申请号：US668720
申请日：1991-03-13
申请人： Nobuhiro Okano , Hiroshi Uemura
发明人： Nobuhiro Okano , Hiroshi Uemura
IPC分类号： H02H9/04
CPC分类号： H02H9/041 , H01L23/62 , H01L2924/0002
摘要： An apparatus for protecting against overvoltage includes a semiconductor switching element and a trigger element. The semiconductor switching element is formed of a PNPN junction including a plurality of PN junctions and the trigger element has a characteristic similar to that of a PN junction Zener diode. The apparatus for protecting against overvoltage is normally nonconductive; however, once an overvoltage not lower than a defined level is applied, the trigger element attains a state so as to have a gate current flow from a gate electrode thereof to the semiconductor switching element. In response to this, the semiconductor switching element causes a so-called thyristor phenomenon, thereby protecting a load connected in parallel to the apparatus for protecting against overvoltage, i.e., an object to be protected, from being provided with the overvoltage.
摘要翻译：用于防止过电压的装置包括半导体开关元件和触发元件。半导体开关元件由包括多个PN结的PNPN结形成，并且触发元件具有与PN结齐纳二极管相似的特性。用于防止过电压的装置通常是不导电的; 然而，一旦施加不低于限定电平的过电压，则触发元件达到使其栅极电流从其栅电极流到半导体开关元件的状态。响应于此，半导体开关元件引起所谓的晶闸管现象，从而保护与用于防止过电压的装置（即，被保护物体）并联连接的负载不被提供过电压。

3. 发明授权

US5237531A Read-only memory having a security circuit preventing unauthorized memory retrieval 失效
标题翻译：具有预防未知存储器检索的安全电路的只读存储器
公开(公告)号：US5237531A
公开(公告)日：1993-08-17
申请号：US631727
申请日：1990-12-20
申请人： Nobuhiro Okano , Hiroshi Uemura
发明人： Nobuhiro Okano , Hiroshi Uemura
IPC分类号： G06F12/14 , G06F21/22 , G06F21/24
CPC分类号： G06F12/1433
摘要： A read-only memory provides a security circuit capable of nullifying data being output from the read-only memory itself, a memory cell array consisting of memory cells arranged in matrix, an input driver for receiving and amplifying address signals sent from a CPU, a decoder for specifying a memory cell included in the memory cell array in response to address signals sent from the input driver, and an output buffer for temporarily storing storage data of the memory cell and sending to the security circuit. The security circuit is used for inhibiting impermissible copying of memory data of the read-only memory. It serves to nullify the data read out of the read-only memory unless a memory address for specifying the data being output meets a predetermined address. That is, the security circuit can disable all of the address signals or one of the address signal when a predetermined address is accessed in the impermissible data copying operation.
摘要翻译：只读存储器提供能够使从只读存储器本身输出的数据无效的安全电路，由矩阵排列的存储单元组成的存储单元阵列，用于接收和放大从CPU发送的地址信号的输入驱动器，解码器，用于响应于从输入驱动器发送的地址信号指定包括在存储单元阵列中的存储单元;以及输出缓冲器，用于临时存储存储器单元的存储数据并发送到安全电路。安全电路用于禁止只读存储器的存储器数据的不允许复制。它用于使从只读存储器读出的数据无效，除非用于指定正在输出的数据的存储器地址满足预定的地址。也就是说，当在不允许的数据复制操作中访问预定地址时，安全电路可以禁用所有地址信号或地址信号中的一个。

4. 发明授权

US5329093A Burn-in apparatus for semiconductor integrated device 失效
标题翻译：半导体集成器件的老化装置
公开(公告)号：US5329093A
公开(公告)日：1994-07-12
申请号：US911687
申请日：1992-07-13
申请人： Nobuhiro Okano
发明人： Nobuhiro Okano
IPC分类号： G01R31/26 , G01R31/28 , H05B1/00
CPC分类号： G01R31/2863
摘要： The burn-in apparatus according to the present invention comprises a fixing unit for accommodating and fixing a plurality of semiconductor integrated devices and a unit for accommodating the fixing unit with the devices so as to keep a thermal condition therein. The fixing unit and the unit for accommodating the fixing unit are combined as one body to be carryable. The apparatus further comprises a unit for connecting the semiconductor integrated devices with a power supply disposed outside of the apparatus. When a burn-in test is conducted, the fixing unit and the unit for accommodating the fixing unit are combined as one body, and this combined body is fitted with a connector. After the burn-in test is finished, by detaching the unit for accommodating the fixing unit, the fixing unit can be used as trays for conveying the devices to the next test process.
摘要翻译：根据本发明的老化装置包括用于容纳和固定多个半导体集成器件的固定单元和用于容纳固定单元的装置，以便在其中保持热条件。固定单元和用于容纳固定单元的单元被组合为一个可携带的主体。该装置还包括用于将半导体集成装置与设置在装置外部的电源连接的单元。当进行老化测试时，固定单元和用于容纳定影单元的单元被组合为一体，并且该组合体装配有连接器。在老化测试完成之后，通过拆卸用于容纳定影单元的单元，定影单元可以用作将设备传送到下一个测试过程的托盘。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式