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    • 2. 发明授权
    • Silicon thin film transistor and method for producing the same
    • 硅薄膜晶体管及其制造方法
    • US5109260A
    • 1992-04-28
    • US564815
    • 1990-08-08
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • H01L21/336H01L29/417H01L29/786
    • H01L29/66765H01L29/41733H01L29/78618H01L29/78621H01L29/78624
    • A silicon thin film transistor array includes a plurality of silicon thin film transistors in an array-like form, each silicon thin film transistor including an insulating substrate, a gate electrode formed on the insulating substrate, a gate insulating layer formed on the insulating substrate containing the gate electrode, a pair of first impurity contained silicon layers formed on the gate insulating layer in such a manner as to transversely cross a terminal part of the gate electrode, an intrinsic silicon layer formed on the pair of first impurity contained silicon layers and on the gate insulating layer between the pair of first impurity contained silicon layers in such a manner as to connect the pair of first impurity contained silicon layers, a protective insulation layer formed on the intrinsic silicon layer, and a source electrode and a drain electrode formed at contact parts of the pair of first impurity contained silicon layers; gate wiring for connecting the gate electrodes of the silicon thin film transistors to each other; and source wiring for connecting the source electrodes of the silicon thin film transistors to each other.
    • 硅薄膜晶体管阵列包括阵列状形式的多个硅薄膜晶体管,每个硅薄膜晶体管包括绝缘基板,形成在绝缘基板上的栅电极,形成在绝缘基板上的栅绝缘层, 栅电极,一对第一杂质含有在栅极绝缘层上形成的跨越栅电极的端部的硅层,形成在一对第一杂质上的本征硅层含有硅层和在 一对第一杂质之间的栅极绝缘层包含硅层,以便连接一对第一杂质含硅层,形成在本征硅层上的保护绝缘层,以及形成在源极电极和漏电极 该对第一杂质的接触部分含有硅层; 用于将硅薄膜晶体管的栅电极彼此连接的栅极布线; 以及用于将硅薄膜晶体管的源电极彼此连接的源极布线。
    • 4. 发明授权
    • Method of fabricating a reverse staggered type silicon thin film
transistor
    • 制造反向类型硅薄膜晶体管的方法
    • US5053354A
    • 1991-10-01
    • US535440
    • 1990-06-08
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • H01L29/786
    • H01L29/78669
    • A reverse staggered type silicon thin film transistor includes a substrate having a gate electrode; a gate insulating layer on the substrate and the gate electrode, the gate insulating layer having a transistor-forming portion; a lower layer silicon film on the transistor-forming portion of the gate insulating layer and in contact therewith, the lower layer silicon film being formed at a first temperature and with a first thickness; an upper layer silicon film formed on the transistor-forming portion of the gate insulating layer at a second temperature which is lower than the first temperature and with a second thickness greater than the first thickness; an n-type silicon layer on the upper layer silicon film and in contact therewith; a source electrode on the n-type silicon layer; and a drain electrode on the n-type silicon layer.
    • 反向交错型硅薄膜晶体管包括具有栅电极的基板; 在所述基板上的栅极绝缘层和所述栅电极,所述栅极绝缘层具有晶体管形成部分; 在所述栅极绝缘层的所述晶体管形成部分上与其接触的下层硅膜,所述下层硅膜以第一温度和第一厚度形成; 在第二温度下形成在所述栅极绝缘层的所述晶体管形成部分上的上层硅膜,所述第二温度低于所述第一温度并且具有大于所述第一厚度的第二厚度; 在上层硅膜上并与其接触的n型硅层; n型硅层上的源电极; 和n型硅层上的漏电极。
    • 6. 发明授权
    • Silicon thin film transistor
    • 硅薄膜晶体管
    • US5021850A
    • 1991-06-04
    • US377873
    • 1989-07-10
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • H01L21/336H01L29/786
    • H01L29/66765H01L29/78618H01L29/78621H01L29/78624H01L29/7866H01L29/78669
    • A silicon thin film transistor array includes a plurality of silicon thin film transistors in an array-like form, each silicon thin film transistor including an insulating substrate, a gate electrode formed on the insulating substrate, a gate insulating layer formed on the insulating substrate containing the gate electrode, a pair of first impurity contained silicon layers formed on the gate insulating layer in such a manner as to transversely cross a terminal part of the gate electrode, an intrinsic silicon layer formed on the pair of first impurity contained silicon layers and on the gate insulating layer between the pair of first impurity contained silicon layers in such a manner as to connect the pair of first impurity contained silicon layers, a protective insulation layer formed on the intrinsic silicon layer, and a source electrode and a drain electrode formed at contact parts of the pair of first impurity contained silicon layers; gate wiring for connecting the gate electrodes of the silicon thin film transistors to each other; and source wiring for connecting the source electrodes of the silicon thin film transistors to each other.
    • 硅薄膜晶体管阵列包括阵列状形式的多个硅薄膜晶体管,每个硅薄膜晶体管包括绝缘基板,形成在绝缘基板上的栅电极,形成在绝缘基板上的栅绝缘层, 栅电极,一对第一杂质含有在栅极绝缘层上形成的跨越栅电极的端部的硅层,形成在一对第一杂质上的本征硅层含有硅层和在 一对第一杂质之间的栅极绝缘层包含硅层,以便连接一对第一杂质含硅层,形成在本征硅层上的保护绝缘层,以及形成在源极电极和漏电极 该对第一杂质的接触部分含有硅层; 用于将硅薄膜晶体管的栅电极彼此连接的栅极布线; 以及用于将硅薄膜晶体管的源电极彼此连接的源极布线。
    • 8. 发明授权
    • Silicon thin film transistor
    • 硅薄膜晶体管
    • US5122849A
    • 1992-06-16
    • US564818
    • 1990-08-08
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • Sakae TanakaYoshiaki WatanabeKatsuo ShiraiYoshihisa Ogiwara
    • H01L29/786
    • H01L29/78624H01L29/78618H01L29/78621
    • A silicon thin film transistor array includes a plurality of silicon thin film transistors in an array-like form, each silicon thin film transistor including an insulating substrate, a gate electrode formed on the insulating substrate, a gate insulating layer formed on the insulating substrate containing the gate electrode, a pair of first impurity contained silicon layers formed on the gate insulating layer in such a manner as to transversely cross a terminal part of the gate electrode, an intrinsic silicon layer formed on the pair of first impurity contained silicon layers and on the gate insulating layer between the pair of first impurity contained silicon layers in such a manner as to connect the pair of first impurity contained silicon layers, a protective insulation layer formed on the intrinsic silicon layer, and a source electrode and a drain electrode formed at contact parts of the pair of first impurity contained silicon layers; gate wiring for connecting the gate electrodes of the silicon thin film transistors to each other; and source wiring for connecting the source electrodes of the silicon thin film transistors to each other.
    • 硅薄膜晶体管阵列包括阵列状形式的多个硅薄膜晶体管,每个硅薄膜晶体管包括绝缘基板,形成在绝缘基板上的栅电极,形成在绝缘基板上的栅绝缘层, 栅电极,一对第一杂质含有在栅极绝缘层上形成的跨越栅电极的端部的硅层,形成在一对第一杂质上的本征硅层含有硅层和在 一对第一杂质之间的栅极绝缘层包含硅层,以便连接一对第一杂质含硅层,形成在本征硅层上的保护绝缘层,以及形成在源极电极和漏电极 该对第一杂质的接触部分含有硅层; 用于将硅薄膜晶体管的栅电极彼此连接的栅极布线; 以及用于将硅薄膜晶体管的源电极彼此连接的源极布线。