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1. 发明授权

US06509648B1 Method of manufacturing semiconductor device and semiconductor device 失效
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US06509648B1
公开(公告)日：2003-01-21
申请号：US09691030
申请日：2000-10-19
申请人： Noboru Morimoto , Masazumi Matsuura , Kinya Goto
发明人： Noboru Morimoto , Masazumi Matsuura , Kinya Goto
IPC分类号： H01L2144
CPC分类号： H01L21/76819
摘要： A method of manufacturing a semiconductor device is obtained which is capable of evading generation of a short circuit between wirings in an upper wiring layer even if a part of an upper surface of an FSG film is exposed by variations in a production step. After a USG film (4) is deposited to a thickness of 1 Hm over an entire surface of an FSG film (3), the USG film (4) is polished and removed by a thickness of 900 nm from an upper surface thereof by the CMP method. At this time, part of an upper surface of the FSG film (3) is exposed by variations in a production step. Next, the surface of the interlayer dielectric film (50) is cleaned with a cleaning liquid whose etching rate to the FSG film (3) and etching rate to the USG film (5) are substantially the same. Such a cleaning liquid may be, for example, an ammonia hydrogen peroxide mixture of NH4OH:H2O2:H2O=1:1:20. The structure shown in FIG. 5 is dipped in the above-mentioned ammonia hydrogen peroxide mixture for 60 seconds to clean the surface of the interlayer dielectric film (50).
摘要翻译：获得制造半导体器件的方法，即使通过制造步骤的变化使FSG膜的上表面的一部分露出，也能够避免在上布线层中的布线之间的短路的产生。在USG膜（4）在FSG膜（3）的整个表面上沉积厚度为1m的USG膜（4）之后，将USG膜（4）从其上表面抛光并去除900nm的厚度， CMP方法。此时，FSG膜（3）的上表面的一部分通过生产步骤的变化而暴露。接下来，用对FSG膜（3）的蚀刻速率和对USG膜（5）的蚀刻速率基本相同的清洗液清洁层间绝缘膜（50）的表面。这样的清洗液可以是例如NH 4 OH:H 2 O 2 :H 2 O = 1：1：20的氨过氧化氢混合物。图1所示的结构 5浸渍在上述氨过氧化氢混合物中60秒以清洁层间电介质膜（50）的表面。

2. 发明授权

US06737319B2 Method of manufacturing semiconductor device and semiconductor device 失效
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US06737319B2
公开(公告)日：2004-05-18
申请号：US10300579
申请日：2002-11-21
申请人： Noboru Morimoto , Masazumi Matsuura , Kinya Goto
发明人： Noboru Morimoto , Masazumi Matsuura , Kinya Goto
IPC分类号： H01L218242
CPC分类号： H01L21/76819
摘要： A method of manufacturing a semiconductor device is obtained which is capable of evading generation of a short circuit between wirings in an upper wiring layer even if a part of an upper surface of an FSG film is exposed by variations in a production step. After a USG film (4) is deposited to a thickness of 1 &mgr;m over an entire surface of an FSG film (3), the USG film (4) is polished and removed by a thickness of 900 nm from an upper surface thereof by the CMP method. At this time, a part of an upper surface of the FSG film (3) is exposed by variations in a production step. Next, the surface of the interlayer dielectric film (50) is cleaned with a cleaning liquid whose etching rate to the FSG film (3) and etching rate to the USG film (5) are substantially the same. Such a cleaning liquid may be, for example, an ammonia hydrogen peroxide mixture of NH4OH:H2O2:H2O=1:1:20. The structure shown in FIG. 5 is dipped in the above-mentioned ammonia hydrogen peroxide mixture for 60 seconds to clean the surface of the interlayer dielectric film (50).
摘要翻译：获得制造半导体器件的方法，即使通过制造步骤的变化使FSG膜的上表面的一部分露出，也能够避免在上布线层中的布线之间的短路的产生。在USG膜（4）在FSG膜（3）的整个表面上沉积1μm的厚度之后，USG膜（4）从上表面抛光并去除900nm的厚度， CMP方法。此时，FSG膜（3）的上表面的一部分通过制造工序的变形而露出。接下来，用对FSG膜（3）的蚀刻速率和对USG膜（5）的蚀刻速率基本相同的清洗液清洁层间绝缘膜（50）的表面。这样的清洗液可以是例如NH 4 OH:H 2 O 2 :H 2 O = 1：1：20的氨过氧化氢混合物。图1所示的结构 5浸渍在上述氨过氧化氢混合物中60秒以清洁层间电介质膜（50）的表面。

3. 发明授权

US06399424B1 Method of manufacturing contact structure 失效
标题翻译：制造接触结构的方法
公开(公告)号：US06399424B1
公开(公告)日：2002-06-04
申请号：US09663201
申请日：2000-09-18
申请人： Masazumi Matsuura , Kinya Goto , Noboru Morimoto
发明人： Masazumi Matsuura , Kinya Goto , Noboru Morimoto
IPC分类号： H01L2144
CPC分类号： H01L21/76811 , H01L21/76801 , H01L21/76813 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Implemented is a method of manufacturing a contact structure having a combination of formation of a buried wiring and that of a low dielectric constant interlayer insulating film in which a connecting hole to be formed in a low dielectric constant interlayer insulating film does not turn into an abnormal shape. A fourth interlayer insulating film 11 is formed on an upper surface of a third interlayer insulating film 10. Next, patterning for a wiring trench and a connecting hole is carried out into the fourth interlayer insulating film 11 and the third interlayer insulating film 10, respectively. Then, a pattern of the connecting hole is first formed in a third low dielectric constant interlayer insulating film 9. Thereafter, a second interlayer insulating film 8 exposed in the pattern is removed and a pattern of the wiring trench is formed in the third interlayer insulating film 10. Subsequently, second and third low dielectric constant interlayer insulating films 7 and 9 are etched, and the wiring trench and the connecting hole are formed at the same time. Thus, a photoresist can be formed again without the second and third low dielectric constant interlayer insulating films 7 and 9 exposed, and an abnormal shape is generated in the connecting hole with difficulty.
摘要翻译：具体实施方式是制造具有掩埋布线的形成和低介电常数层间绝缘膜的组合的接触结构的方法，其中形成在低介电常数层间绝缘膜中的连接孔不会变成异常形状。第四层间绝缘膜11形成在第三层间绝缘膜10的上表面上。接下来，分别对第四层间绝缘膜11和第三层间绝缘膜10进行布线沟槽和连接孔的图案化。然后，首先在第三低介电常数层间绝缘膜9中形成连接孔的图案。然后，去除以图案露出的第二层间绝缘膜8，并且在第三层间绝缘层中形成布线沟槽的图案随后，蚀刻第二和第三低介电常数层间绝缘膜7和9，并且同时形成布线沟槽和连接孔。因此，可以再次形成光致抗蚀剂，而不会使第二和第三低介电常数层间绝缘膜7和9暴露，并且难以在连接孔中产生异常形状。

4. 发明授权

US07981790B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07981790B2
公开(公告)日：2011-07-19
申请号：US12683949
申请日：2010-01-07
申请人： Teruhiko Kumada , Hideharu Nobutoki , Naoki Yasuda , Kinya Goto , Masazumi Matsuura
发明人： Teruhiko Kumada , Hideharu Nobutoki , Naoki Yasuda , Kinya Goto , Masazumi Matsuura
IPC分类号： H01L21/4763
CPC分类号： H01L21/02271 , H01L21/314 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76835
摘要： There is provided a semiconductor device and method of fabricating the same that employs an insulation film of a borazine-based compound to provided enhanced contact between a material for insulation and that for interconnection, increased mechanical strength, and other improved characteristics. The semiconductor device includes a first insulation layer having a recess with a first conductor layer buried therein, an etching stopper layer formed on the first insulation layer, a second insulation layer formed on the etching stopper layer, a third insulation layer formed on the second insulation layer, and a second conductor layer buried in a recess of the second and third insulation layers. The second and third insulation layers are grown by chemical vapor deposition with a carbon-containing borazine compound used as a source material and the third insulation layer is smaller in carbon content than the second insulation layer.
摘要翻译：提供一种半导体器件及其制造方法，其采用环硼氮烷化合物的绝缘膜，以提供绝缘材料和互连材料，增加的机械强度和其它改进的特性之间的增强的接触。半导体器件包括具有埋设有第一导体层的凹部的第一绝缘层，形成在第一绝缘层上的蚀刻阻挡层，形成在蚀刻停止层上的第二绝缘层，形成在第二绝缘层上的第三绝缘层层，以及埋在第二绝缘层和第三绝缘层的凹部中的第二导体层。第二绝缘层和第三绝缘层通过化学气相沉积生长，其中含有碳源的环硼氮烷化合物用作源材料，第三绝缘层的碳含量比第二绝缘层小。

5. 发明授权

US07605448B2 Semiconductor device with seal ring 有权
标题翻译：半导体器件带密封圈
公开(公告)号：US07605448B2
公开(公告)日：2009-10-20
申请号：US11220603
申请日：2005-09-08
申请人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
发明人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
IPC分类号： H01L21/56
CPC分类号： H01L23/585 , H01L23/3192 , H01L23/53295 , H01L23/564 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device according to the invention is a semiconductor device which includes a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls in closed loop form in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.
摘要翻译：根据本发明的半导体器件是一种半导体器件，其包括相对介电常数小于3.5的低介电常数膜，在平面图中设置有一个或多个密闭环，其为闭环形式的防潮壁并且其中至少一个所述密封环包括在芯片角附近以向内突出形式的密封环突出部分。

6. 发明授权

US06222256B1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06222256B1
公开(公告)日：2001-04-24
申请号：US09359654
申请日：1999-07-26
申请人： Masazumi Matsuura , Kinya Goto
发明人： Masazumi Matsuura , Kinya Goto
IPC分类号： H01L2358
CPC分类号： H01L21/02131 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02211 , H01L21/02274 , H01L21/31629 , H01L21/76801 , H01L21/76828 , H01L21/76829 , H01L21/76837 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A first layer metal wire, an SiOF film and an F diffusion prevention film are formed on a surface of a base layer including a substrate, elements formed on the substrate and an insulator layer formed to cover the substrate and the elements. The F diffusion prevention film may be prepared from a silicon oxynitride film or a silicon oxide film containing Si—H bonds. A spacer film is formed on a surface of the F diffusion prevention film and its surface is flattened. A second layer metal wire is formed on a surface of the spacer film. Thus implemented is a semiconductor device comprising an F diffusion prevention film preventing F atoms contained in an SiOF film from diffusing into an upper metal wire with the F diffusion prevention film not etched in formation of the upper metal wire and a method of manufacturing a semiconductor device not directly polishing an SiOF film by CMP.
摘要翻译：在包括基板的基底层，形成在基板上的元件和形成为覆盖基板和元件的绝缘体层的表面上形成第一层金属线，SiOF膜和F扩散防止膜。 F扩散防止膜可以由氧氮化硅膜或含有Si-H键的氧化硅膜制备。在F扩散防止膜的表面上形成间隔膜，其表面变平。在间隔膜的表面上形成第二层金属线。这样实施的是一种半导体器件，其特征在于包括防止在形成所述上部金属线时未蚀刻所述F扩散防止膜的SiOF膜中包含的F原子的F扩散防止膜扩散到上部金属线中的半导体器件以及制造半导体器件的方法不通过CMP直接抛光SiOF膜。

7. 发明授权

US07602063B2 Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07602063B2
公开(公告)日：2009-10-13
申请号：US11172871
申请日：2005-07-05
申请人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
发明人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76802 , H01L21/02074 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/02362 , H01L21/3105 , H01L21/31633 , H01L21/76801 , H01L21/76826 , H01L21/76829 , H01L21/76835 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： In a semiconductor having a multilayer wiring structure device on a semiconductor substrate, the multilayer wiring structure includes an interlayer insulating film having at least an organic siloxane insulating film. The organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive. Further, the multilayer wiring structure may include an insulating layer having a ratio of carbon atoms to silicon atoms not greater than 0.1, the insulating layer being formed on the top surface of the organic siloxane insulating film as a result of carbon leaving the organic siloxane insulating film.
摘要翻译：在半导体衬底上具有多层布线结构器件的半导体中，多层布线结构包括至少具有有机硅氧烷绝缘膜的层间绝缘膜。有机硅氧烷绝缘膜的相对介电常数为3.1以下，硬度为2.7GPa以上，碳原子与硅原子的比例在0.5以上且1.0以下。此外，多层布线结构可以包括碳原子与硅原子之比不大于0.1的绝缘层，绝缘层由有机硅氧烷绝缘膜的碳离子形成在有机硅氧烷绝缘膜的顶表面上电影。

8. 发明申请

US20060006530A1 Semiconductor device and manufacturing method therefor 有权
公开(公告)号：US20060006530A1
公开(公告)日：2006-01-12
申请号：US11172871
申请日：2005-07-05
申请人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
发明人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
IPC分类号： H01L21/4763 , H01L23/48 , H01L21/26
CPC分类号： H01L21/76802 , H01L21/02074 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/02362 , H01L21/3105 , H01L21/31633 , H01L21/76801 , H01L21/76826 , H01L21/76829 , H01L21/76835 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： In a semiconductor having a multilayer wiring structure device on a semiconductor substrate, the multilayer wiring structure includes an interlayer insulating film having at least an organic siloxane insulating film. The organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive. Further, the multilayer wiring structure may include an insulating layer having a ratio of carbon atoms to silicon atoms not greater than 0.1, the insulating layer being formed on the top surface of the organic siloxane insulating film as a result of carbon leaving the organic siloxane insulating film.

9. 发明申请

US20050263857A1 Electronic device and method for fabricating the same 失效
标题翻译：电子器件及其制造方法
公开(公告)号：US20050263857A1
公开(公告)日：2005-12-01
申请号：US11165224
申请日：2005-06-24
申请人： Hiroshi Yuasa , Tetsuo Satake , Masazumi Matsuura , Kinya Goto
发明人： Hiroshi Yuasa , Tetsuo Satake , Masazumi Matsuura , Kinya Goto
IPC分类号： H01L21/312 , H01L21/316 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/336 , H01L21/31 , H01L21/469 , H01L21/4763 , H01L23/58
CPC分类号： H01L21/76822 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/3122 , H01L21/76801 , H01L21/76807 , H01L21/76808 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A hole is formed in an insulating film containing silicon and carbon. The insulating film has a density or a carbon concentration varying gradually in the direction of the thickness thereof.
摘要翻译：在含有硅和碳的绝缘膜中形成孔。绝缘膜具有在其厚度方向上逐渐变化的密度或碳浓度。

10. 发明授权

US06930394B2 Electronic device includes an insulating film having density or carbon concentration varying gradually in the direction of the thickness and a conductive film formed therein 失效
标题翻译：电子器件包括具有在厚度方向上逐渐变化的密度或碳浓度的绝缘膜和形成在其中的导电膜
公开(公告)号：US06930394B2
公开(公告)日：2005-08-16
申请号：US10621638
申请日：2003-07-18
申请人： Hiroshi Yuasa , Tetsuo Satake , Masazumi Matsuura , Kinya Goto
发明人： Hiroshi Yuasa , Tetsuo Satake , Masazumi Matsuura , Kinya Goto
IPC分类号： H01L21/312 , H01L21/316 , H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L21/76822 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/3122 , H01L21/76801 , H01L21/76807 , H01L21/76808 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A hole is formed in an insulating film containing silicon and carbon. The insulating film has a density or a carbon concentration varying gradually in the direction of the thickness thereof.
摘要翻译：在含有硅和碳的绝缘膜中形成孔。绝缘膜具有在其厚度方向上逐渐变化的密度或碳浓度。

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