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1. 发明申请

US20100264978A1 SIGNAL CONVERSION SYSTEM FOR SENDING OR RECEIVING A RADIOFREQUENCY SIGNAL 有权
标题翻译：用于发送或接收无线电信号的信号转换系统
公开(公告)号：US20100264978A1
公开(公告)日：2010-10-21
申请号：US12744144
申请日：2008-11-21
申请人： Nicolas Sornin , Laurent Perraud
发明人： Nicolas Sornin , Laurent Perraud
IPC分类号： G06G7/16
CPC分类号： H04B1/403 , H04B1/28
摘要： System for converting a radiofrequency signal SRX so as to recover encoded information carried by the signal SRX, includes generating elements arranged to generate a signal SLO, mixing elements (3) arranged to generate a signal SRX-LO by mixing the signal SRX with the signal SLO, an analog/digital converter arranged to convert the signal SRXLO into a digital signal SRX-LO-Num, a device generating an error correction digital signal SCor, the device being arranged so that the signal SCor reflects the phase gap between the phase of the signal SLO and a phase setpoint, the phase setpoint being the phase of an ideal signal S0, ideal for recovering the encoded information carried by the signal SRX, combining elements arranged to generate the signal S0′Num by combining the signal SRX-LO-Num with the signal SCor. A system for converting a digital signal so as to send a radiofrequency analog signal carrying the information of the digital signal is also described.
摘要翻译：用于转换射频信号SRX以恢复由信号SRX承载的编码信息的系统包括生成被配置为产生信号SLO的元件，通过将信号SRX与信号SRX混合而被布置以产生信号SRX-LO的混合元件（3） SLO是一种模拟/数字转换器，被配置为将信号SRXLO转换为数字信号SRX-LO-Num，该数字信号SRX-LO-Num是产生纠错数字信号SCor的装置，该装置被布置成使得信号SCor反映相位信号SLO和相位设定点，相位设定点是理想信号S0的相位，理想地用于恢复由信号SRX承载的编码信息，组合用于通过组合信号SRX-LO- 数字与信号SCor。还描述了一种用于转换数字信号以便发送携带数字信号的信息的射频模拟信号的系统。

2. 发明授权

US08379770B2 Signal conversion system for sending or receiving a radiofrequency signal 有权
标题翻译：用于发送或接收射频信号的信号转换系统
公开(公告)号：US08379770B2
公开(公告)日：2013-02-19
申请号：US12744144
申请日：2008-11-21
申请人： Nicolas Sornin , Laurent Perraud
发明人： Nicolas Sornin , Laurent Perraud
IPC分类号： H04L27/06
CPC分类号： H04B1/403 , H04B1/28
摘要： System for converting a radiofrequency signal SRX so as to recover encoded information carried by the signal SRX, includes generating elements arranged to generate a signal SLO, mixing elements (3) arranged to generate a signal SRX-LO by mixing the signal SRX with the signal SLO, an analog/digital converter arranged to convert the signal SRXLO into a digital signal SRX-LO-Num, a device generating an error correction digital signal SCor, the device being arranged so that the signal SCor reflects the phase gap between the phase of the signal SLO and a phase setpoint, the phase setpoint being the phase of an ideal signal S0, ideal for recovering the encoded information carried by the signal SRX, combining elements arranged to generate the signal S0′-Num by combining the signal SRX-LO-Num with the signal SCor. A system for converting a digital signal so as to send a radiofrequency analog signal carrying the information of the digital signal is also described.
摘要翻译：用于转换射频信号SRX以恢复由信号SRX承载的编码信息的系统包括生成被配置为产生信号SLO的元件，通过将信号SRX与信号SRX混合而被布置以产生信号SRX-LO的混合元件（3） SLO是一种模拟/数字转换器，被配置为将信号SRXLO转换为数字信号SRX-LO-Num，该数字信号SRX-LO-Num是产生纠错数字信号SCor的装置，该装置被布置成使得信号SCor反映相位信号SLO和相位设定点，相位设定点是理想信号S0的相位，理想地用于恢复由信号SRX携带的编码信息，组合被布置为通过组合信号SRX-LO而产生信号S0'-Num的元件 - 带有信号SCor。还描述了一种用于转换数字信号以便发送携带数字信号的信息的射频模拟信号的系统。

3. 发明授权

US07043206B2 Fully integrated offset compensation feedback circuit 失效
公开(公告)号：US07043206B2
公开(公告)日：2006-05-09
申请号：US10280991
申请日：2002-10-25
申请人： Cheryl Herdey , Shane Kaiser , Hung-Chuan Pai , Laurent Perraud , Nicolas Sornin , Gerald J. Twomey
发明人： Cheryl Herdey , Shane Kaiser , Hung-Chuan Pai , Laurent Perraud , Nicolas Sornin , Gerald J. Twomey
IPC分类号： H04B1/10 , H04B15/00
CPC分类号： H03F3/45977 , H04L2027/0016
摘要： An offset correction analogic circuit capable of compensating the offset of a digital baseband is described. The circuit comprises analog means to receive an output differential signal issued from a differential signal path. The differential signal path may be a baseband filter as used in digital communication systems. The baseband filter inputs an input differential signal having an offset to be compensated. The output differential signal is fed into an analog integrator to generate a pulsed signal either on a first output line or on a second output line according to the polarity of the output differential signal. The pulsed signal is then integrated into a switched capacitor and a differential compensation offset signal is issued. The frequency of the pulsed signal is preferably proportional to the voltage value of the output differential signal. The compensation offset signal may be summed with the input differential signal into a summing circuit.

4. 发明申请

US20140035632A1 PHASE-LOCKED LOOP 有权
标题翻译：相锁环
公开(公告)号：US20140035632A1
公开(公告)日：2014-02-06
申请号：US13599496
申请日：2012-08-30
申请人： Pasquale Lamanna , Nicolas Sornin , Davide Orifiamma , Cristian Pavao Moreira
发明人： Pasquale Lamanna , Nicolas Sornin , Davide Orifiamma , Cristian Pavao Moreira
IPC分类号： H03L7/08 , H03B19/00
CPC分类号： H03L7/093 , H03L7/091
摘要： A phase-locked loop for generating an output signal including a signal generator arranged to generate an output, a comparison unit arranged to compare the output with a reference signal so as to provide a digital signal, and a loop filter arranged to generate a control signal for controlling the signal generator in dependence on the digital signal. The loop filter includes a proportional path having a digital filter arranged to generate a first component of the control signal for controlling the phase of the output generated by the signal generator, and an analogue integral path arranged to generate a second component of the control signal for controlling the frequency of the output generated by the signal generator.
摘要翻译：一种用于产生包括布置成产生输出的信号发生器的输出信号的锁相环，被配置为将输出与参考信号进行比较以提供数字信号的比较单元，和布置成产生控制信号的环路滤波器用于根据数字信号控制信号发生器。环路滤波器包括具有数字滤波器的比例路径，该数字滤波器被布置成产生用于控制由信号发生器产生的输出的相位的控制信号的第一分量，以及模拟积分路径，其被布置为产生控制信号的第二分量控制信号发生器产生的输出频率。

5. 发明授权

US08565708B2 Rejection of interferers 有权
标题翻译：拒绝干扰
公开(公告)号：US08565708B2
公开(公告)日：2013-10-22
申请号：US12992400
申请日：2009-04-07
申请人： Nicolas Sornin
发明人： Nicolas Sornin
IPC分类号： H04B1/10
CPC分类号： H04B1/1036
摘要： A filter for filtering a received signal to attenuate an interferer therein, the interferer having a component at an interferer frequency, and the filter comprising: an intermediate filter providing a passband and a stopband; a first frequency converter configured to form a first intermediate signal by frequency-shifting an input signal derived from the received signal such that a component of the input signal at the interferer frequency is shifted to a frequency in the passband of the intermediate filter, and to input the first intermediate signal to the intermediate filter so as to cause the first intermediate signal to be filtered by the intermediate filter to form a second intermediate signal; a second frequency converter configured to form a cancellation signal by frequency-shifting the second intermediate signal such that a component of the second intermediate signal in the passband of the intermediate filter is shifted to the interferer frequency; and a cancellation unit configured to cancel the cancellation signal from the received signal to attenuate the interferer therein.
摘要翻译：一种用于对接收到的信号进行滤波以衰减其中的干扰源的滤波器，所述干扰源具有干扰频率处的分量，并且所述滤波器包括：提供通带和阻带的中间滤波器; 第一变频器，被配置为通过对从接收信号导出的输入信号进行频移来形成第一中间信号，使得干扰频率处的输入信号的分量被转换到中间滤波器的通带中的频率，并且将第一中间信号输入到中间滤波器，以使第一中间信号被中间滤波器滤波以形成第二中间信号; 第二变频器，被配置为通过对所述第二中间信号进行频率偏移来形成消除信号，使得所述中间滤波器的通带中的所述第二中间信号的分量被偏移到所述干扰频率; 以及取消单元，被配置为从所接收的信号中消除所述抵消信号以衰减所述干扰源。

6. 发明授权

US08373468B2 Charge pump for phase-locked loop 有权
标题翻译：电荷泵用于锁相环
公开(公告)号：US08373468B2
公开(公告)日：2013-02-12
申请号：US12920015
申请日：2009-03-05
申请人： Pasquale Lamanna , Nicolas Sornin
发明人： Pasquale Lamanna , Nicolas Sornin
IPC分类号： H03L7/06
CPC分类号： H03L7/0895 , H03L7/1974
摘要： A current generator for a phase-locked loop arranged to generate an output signal having predetermined frequency-relationship with a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to receive the output signal and divide the output signal to form a feedback signal, the divider being arranged to vary the divisor by which the output signal is divided, a comparison unit arranged to compare the feedback signal with the reference signal and output a first error signal indicative of the phase-difference between the feedback signal and the reference signal to the current generator and a loop filter arranged to filter a current signal output by the current generator to form a control signal for controlling the signal generator, the current generator being capable of receiving the first error signal and generating a current in dependence thereon, receiving a second error signal indicative of an error in the feedback signal caused by the variation of the divisor by which the output signal is divided and generating a current having a magnitude and sign that is dependent on that error and combining the currents generated in dependence on the first error signal and the second error signal to form a current signal output to the loop filter that is representative of an overall error in the output signal of the phase-locked loop relative to the reference signal.
摘要翻译：一种用于产生与参考信号具有预定频率关系的输出信号的锁相环电流发生器，所述锁相环包括布置成产生输出信号的信号发生器，布置成接收输出信号的分频器和将所述输出信号除以形成反馈信号，所述分频器被布置成改变所述输出信号被分频的除数;比较单元，被布置为将所述反馈信号与所述参考信号进行比较，并输出指示所述相位信号的第一误差信号，所述反馈信号和对所述电流发生器的参考信号之间的差异;以及环路滤波器，其布置成对所述电流发生器输出的电流信号进行滤波，以形成用于控制所述信号发生器的控制信号，所述电流发生器能够接收所述第一误差信号并根据其产生电流，接收指示所述feedbac中的错误的第二错误信号 k信号由输出信号被除数的除数的变化引起，并产生具有取决于该误差的幅度和符号的电流，并组合依赖于第一误差信号和第二误差信号而产生的电流以形成输出到环路滤波器的电流信号，其表示锁相环相对于参考信号的输出信号的总体误差。

7. 发明授权

US08373464B2 Digital phase-locked loop architecture 有权
标题翻译：数字锁相环架构
公开(公告)号：US08373464B2
公开(公告)日：2013-02-12
申请号：US13264334
申请日：2010-04-07
申请人： Nicolas Sornin
发明人： Nicolas Sornin
IPC分类号： H03L7/06
CPC分类号： H03L7/081 , H03L7/091
摘要： A phase-locked loop circuit comprising: an oscillator (20) configured to generate an output signal; an input (25) for receiving a reference clock signal; a delay cell (26) configured to delay the reference clock signal to generate a delayed reference clock signal; a phase comparator (27) configured to generate a quantized signal indicative of the phase difference between the output signal and the delayed reference clock signal, an integrator (28) configured to integrate the quantized signal to form an integrated signal; a first feedback path (22) configured to control the phase and/or frequency of the oscillator in dependence on the integrated signal; and a second feedback path (23) configured to adjust the delay applied by the delay cell (26) in dependence on the integrated signal.
摘要翻译：一种锁相环电路，包括：振荡器（20），被配置为产生输出信号; 用于接收参考时钟信号的输入端（25）; 延迟单元（26），被配置为延迟所述参考时钟信号以产生延迟的参考时钟信号; 相位比较器（27），被配置为产生指示所述输出信号和所述延迟的参考时钟信号之间的相位差的量化信号;积分器（28），被配置为积分所述量化信号以形成积分信号; 第一反馈路径（22），被配置为根据所述积分信号来控制所述振荡器的相位和/或频率; 以及第二反馈路径（23），被配置为根据所述积分信号调整由所述延迟单元（26）施加的延迟。

8. 发明授权

US08278984B2 Phase-locked loop 有权
标题翻译：锁相环
公开(公告)号：US08278984B2
公开(公告)日：2012-10-02
申请号：US12918615
申请日：2009-03-05
申请人： Pasquale Lamanna , Nicolas Sornin
发明人： Pasquale Lamanna , Nicolas Sornin
IPC分类号： H03L7/06
CPC分类号： H03L7/0893 , H03L7/093 , H03L7/1974 , H03L2207/06
摘要： A loop filter for a phase-locked loop that generates an output signal having a predetermined phase relationship with a reference signal, the loop filter being arranged to control a signal generator that forms the output signal in dependence on a phase error between the output signal and the reference signal by outputting a control signal for controlling the signal generator in dependence thereon, the loop filter being arranged to form the control signal to comprise a proportional component representative of an instantaneous magnitude of the phase difference and an integral component representative of an integral of the phase difference, the loop filter comprising a proportional path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the proportional component of the control signal in dependence thereon and an integral path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the integral component of the control signal in dependence thereon, the proportional and integral paths being decoupled in the loop filter such that each has a transfer function relating its received signal to its respective component of the control signal that is independent of the other path.
摘要翻译：一种用于产生与参考信号具有预定相位关系的输出信号的锁相环的环路滤波器，所述环路滤波器被布置为根据输出信号和输出信号之间的相位误差来控制形成输出信号的信号发生器所述参考信号通过输出用于根据其控制所述信号发生器的控制信号，所述环路滤波器被布置成形成所述控制信号以包括代表所述相位差的瞬时幅度的比例分量和表示所述相位差的积分分量的积分分量相位差，环路滤波器包括比例路径，该比例路径被布置为接收表示相位差的瞬时幅度的信号，并且形成依赖于其的控制信号的比例分量，以及布置成接收表示瞬时的信号的信号的积分路径相位差的大小和形式根据其控制信号的积分分量，比例积分路径在环路滤波器中解耦，使得每个具有将其接收信号与独立于另一路径的控制信号的相应分量相关联的传递函数。

9. 发明申请

US20110286495A1 Automatic Gain Control and DC Offset Compensation 有权
标题翻译：自动增益控制和直流偏移补偿
公开(公告)号：US20110286495A1
公开(公告)日：2011-11-24
申请号：US13063235
申请日：2009-08-27
申请人： Olivier Bernard Andre Seller , Nicolas Sornin , Damien Richard Smith
发明人： Olivier Bernard Andre Seller , Nicolas Sornin , Damien Richard Smith
IPC分类号： H04L25/06 , H04B1/69
CPC分类号： H03G3/3078
摘要： A signal receiver having a gain control circuit comprising: detection means configured to form a representation of the excess amplitude during a training period of a signal received by the receiver; a first gain stimulus generator configured to generate a first gain stimulus in dependence on the excess amplitude detected by the detection means during the training period; averaging means configured to estimate the average of the signal received by the receiver during the training period; a second gain stimulus generator configured to generate a second gain stimulus in dependence on the average estimated by the averaging means during the training period; and a gain control signal generator configured to generate a gain control signal for the receiver in dependence on the first gain stimulus and the second gain stimulus.
摘要翻译：一种具有增益控制电路的信号接收机，包括：检测装置，被配置为在由接收机接收的信号的训练周期内形成过量幅度的表示; 第一增益刺激发生器，被配置为根据在所述训练周期期间由所述检测装置检测到的超出幅度产生第一增益刺激; 平均装置，被配置为估计在训练期间由接收器接收的信号的平均值; 第二增益刺激发生器，被配置为根据平均装置在训练期间估计的平均值产生第二增益刺激; 以及增益控制信号发生器，被配置为根据第一增益刺激和第二增益激励来产生用于接收机的增益控制信号。

10. 发明授权

US08274325B2 Phase-locked loop 有权
标题翻译：锁相环
公开(公告)号：US08274325B2
公开(公告)日：2012-09-25
申请号：US12921198
申请日：2009-03-05
申请人： Pasquale Lamanna , Nicolas Sornin
发明人： Pasquale Lamanna , Nicolas Sornin
IPC分类号： H03B1/00
CPC分类号： H03L7/093 , H03L7/0893 , H03L2207/06
摘要： A loop filter for receiving an input signal indicative of a phase-difference between a reference signal and a signal output by a signal generator and forming a control signal for controlling the signal generator in dependence thereon, the loop filter comprising a plurality of filter components that determine the frequency response of the filter, said filter components being arranged so that a first set of said components determines one or more zeros of the filter's frequency response and a second set of said components determines one or more poles of the filter's frequency response, each of said first and second sets of filter components being independent of the other such that the zero(s) and pole(s) of the filter's frequency response may be selected independently.
摘要翻译：一种环路滤波器，用于接收指示参考信号和由信号发生器输出的信号之间的相位差的输入信号，并且形成用于根据其控制信号发生器的控制信号，所述环路滤波器包括多个滤波器组件，确定滤波器的频率响应，所述滤波器组件被布置为使得第一组所述分量确定滤波器的频率响应的一个或多个零，并且第二组所述分量确定滤波器的频率响应的一个或多个极点，每个所述第一和第二组滤波器组件独立于另一组，使得可以独立地选择滤波器的频率响应的零点和极点。

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