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    • 2. 发明授权
    • Circuit with a memory array and a reference level generator circuit
    • 具有存储器阵列和参考电平发生器电路的电路
    • US08081523B2
    • 2011-12-20
    • US11813862
    • 2006-01-05
    • Victor Martinus Van AchtNicolaas LambertPierre Hermanus Woerlee
    • Victor Martinus Van AchtNicolaas LambertPierre Hermanus Woerlee
    • G11C5/14
    • G11C7/14
    • A circuit comprises an array of memory cells (10). A plurality of sensing circuits (20), are coupled to the output (14) of respective memory cells (10), for comparing the output signal of the respective one of the memory cells (10) with a reference signal to form a data signal from the output signal from the respective one of the memory cells (10). A reference generator circuit (24, 26) forms the reference signal from a sum wherein each respective one of the memory cells (10) of the addressed group contributes a contribution that is a function of the output signal of the respective one of the memory cells (10). The contributions are equalized for output signal values at more than a saturating distance above the reference signal, and the contributions are equalized for output signal values at more than the saturating distance below the reference signal. In case of storage of multi-level data in the cells the distances from the central level to the saturation levels above and below the reference level are mutually different, with a ratio that corresponds to a ratio of the counts of cells that have been programmed to respective levels.
    • 电路包括存储器单元阵列(10)。 多个感测电路(20)耦合到相应存储单元(10)的输出(14),用于将存储单元(10)中的相应一个的输出信号与参考信号进行比较以形成数据信号 来自存储单元(10)中的相应一个的输出信号。 参考发生器电路(24,26)从一个和形成参考信号,其中寻址组的每个存储单元(10)中的每个相应的一个贡献作为存储单元的相应一个的输出信号的函数 (10)。 在超过参考信号的饱和距离上的输出信号值的贡献相等,并且在超过参考信号以下的饱和距离处的输出信号值的贡献相等。 在单元格中存储多级数据的情况下,从基准电平以上和低于基准电平的中心电平到饱和电平的距离是相互不同的,其比率对应于已经被编程的单元计数的比率 各级别。
    • 4. 发明授权
    • Universal memory device having a profile storage unit
    • 具有简档存储单元的通用存储器件
    • US07831790B2
    • 2010-11-09
    • US10549367
    • 2004-03-17
    • Nicolaas LambertAdrianus Johannes Maria DenissenWilhelmus Franciscus Johannes FontijnRobert Jochemsen
    • Nicolaas LambertAdrianus Johannes Maria DenissenWilhelmus Franciscus Johannes FontijnRobert Jochemsen
    • G06F13/10
    • G06F21/78G06F21/79G06F2221/2141G11C7/1045G11C7/24G11C16/22
    • A universal memory device is presented that provides adaptability to existing hardware and software environments. The memory can “mimic” existing memory technology combining the advantages of integrating all memory capacity into one single technology and still providing the implicit protections and access characteristics known from the different existing memory technologies. The memory device comprises a memory having low-latency, rewritable, non-volatile memory cells, a profile storage unit connected with the memory and comprising access information allocated to a set of request information elements (request profile), such that the access information indicates whether an access request to said memory, the access request having the request profile, is to be allowed or rejected, and an access control unit communicating with the profile storage unit and the memory, and adapted to allow or reject an incoming access request in dependence on the access information allocated to the request profile of the access request.
    • 提出了一种提供对现有硬件和软件环境的适应性的通用存储器件。 存储器可以“模拟”现有存储器技术,结合将所有存储器容量集成到一个单一技术中并且仍然提供从不同现有存储器技术已知的隐式保护和访问特性的优点。 存储装置包括具有低等待时间,可重写,非易失性存储器单元的存储器,与存储器连接的简档存储单元,并且包括分配给一组请求信息元素(请求简档)的访问信息,使得访问信息指示 是否允许或拒绝对所述存储器的访问请求,具有请求简档的访问请求,以及与简档存储单元和存储器通信的访问控制单元,并且适于依赖于允许或拒绝传入的访问请求 关于分配给访问请求的请求简档的访问信息。
    • 6. 发明申请
    • ELECTRONIC CIRCUIT THAT COMPRISES A MEMORY MATRIX AND METHOD OF READING FOR BITLINE NOISE COMPENSATION
    • 包含记忆矩阵的电子电路和用于BITLINE噪声补偿的读取方法
    • US20100232245A1
    • 2010-09-16
    • US12293817
    • 2007-03-27
    • Victor M. G. Van AchtNicolaas Lambert
    • Victor M. G. Van AchtNicolaas Lambert
    • G11C7/02
    • G11C7/02G11C7/062G11C7/14G11C7/18
    • Data is read from a memory matrix (10) with a plurality of bit lines (12). A differential sense amplifier (14) receives a signal derived from a first one of the bit lines (12) on a first input. The differential sense amplifier (14) receives a reference signal from a reference output of a reference circuit (15) to a second input. A second one of the bit lines (12), which is adjacent to the first one of the bit lines (12), is coupled to the reference circuit (15), so that a bit line signal value on the second one of the bit lines (12) affects a reference signal value on the reference output, at least partly reproducing an effect of crosstalk of the bit line signal value (12) on the second one of the bit lines (12) on a bit line signal value on the first one of the bit lines (12).
    • 从具有多个位线(12)的存储矩阵(10)中读取数据。 差分读出放大器(14)在第一输入端接收从位线(12)中的第一位导出的信号。 差分读出放大器(14)从参考电路(15)的参考输出接收参考信号到第二输入端。 与位线(12)中的第一位相邻的位线(12)中的第二位被耦合到参考电路(15),使得位的第二位上的位线信号值 行(12)影响参考输出上的参考信号值,至少部分地再现位线信号值(12)上的位线信号值(12)对第二位线(12)上的串扰的影响 第一个位线(12)。
    • 7. 发明申请
    • NETWORK DEVICE FOR USE IN A NETWORK
    • 网络设备在网络中的使用
    • US20100177763A1
    • 2010-07-15
    • US12664493
    • 2008-06-09
    • Petris Desiderius Victor Van Der StokMarc AounNicolaas LambertJulien Catalano
    • Petris Desiderius Victor Van Der StokMarc AounNicolaas LambertJulien Catalano
    • H04J3/06
    • H04J3/0638H04J3/0685
    • A network (100) comprises at least a network device (110) and a further network device (120). The network device (110) comprises means (400) arranged for detecting an event (170), means (410) for receiving a first timestamp (420) of the further network device and means for taking a second timestamp. The network device is arranged for providing a signal (180) in dependence of a counter (450) reaching an end count. The network device comprises synchronization means (440) arranged for synchronizing the signal (180) with a further signal (190) provided by the further network device (120) by adjusting a value of the end count (60) to a modified end count (230), said modified end count being in dependence of the first and second timestamp. After having provided the synchronized signal (180c, 180d) the value of the end count is re-adjusted from the modified end count to its value prior to the adjustment.
    • 网络(100)至少包括网络设备(110)和另外的网络设备(120)。 网络设备(110)包括被安排用于检测事件(170)的装置(400),用于接收另外的网络设备的第一时间戳(420)的装置(410)和用于获取第二时间戳的装置。 网络设备被布置成根据达到终端计数的计数器(450)提供信号(180)。 网络设备包括同步装置(440),其被配置为通过将结束计数(60)的值调整到修改的结束计数(60)而将信号(180)与由另外的网络设备(120)提供的另外的信号(190) 230),所述修改的末端计数依赖于第一和第二时间戳。 在提供了同步信号(180c,180d)之后,将结束计数的值从修改的结束计数重新调整到其调整之前的值。
    • 8. 发明授权
    • Peer to peer transfer of content
    • 对等转让内容
    • US07574515B2
    • 2009-08-11
    • US10553549
    • 2004-04-22
    • Wilhelmus Franciscus Johannes FontijnNicolaas Lambert
    • Wilhelmus Franciscus Johannes FontijnNicolaas Lambert
    • G06F15/16
    • H04L67/104G06F21/10H04L63/145H04L67/1082H04L67/42H04L69/329H04L2463/101
    • This invention relates to a method, a device, a server and a system of/for peer to peer transfer of content. Said method includes the steps of receiving and transmitting, from a first device (11), a first request with a first selection criterion for a first content to a server (18) or to a second device (12); transferring the first content satisfying said first selection criterion to said first device from the server, when said server previously has acknowledged said first device as a legal recipient of said first content and in case said first content is available only on said server, and noting that said first device subsequently has the requested first content available for other devices (14, 15, 16, 17); or re-directing said first request to a third device (13) on which the server knows that the requested first content is still available and transferring said first content satisfying said first selection criterion to said first device from the third device; or transferring the first content satisfying said first selection criterion to said first device from the second device, when said first content is available on said second device, and informing the server that said first content has been transferred to said first device from said second device; and rewarding the one of said second or third device from which said first content was transferred to said first device, when content was transferred from one of these; and charging said first device for reception of said first content. This enables for download, upload and sharing of legally protected paid-for content.
    • 本发明涉及一种用于内容的对等传送的方法,设备,服务器和系统。 所述方法包括以下步骤:从第一设备(11)接收并向服务器(18)或第二设备(12)发送第一内容的第一选择标准的第一请求; 当所述服务器先前已将所述第一设备确认为所述第一内容的合法接收者,并且在所述第一内容仅在所述服务器上可用的情况下,将满足所述第一选择标准的第一内容传送到所述第一设备,并注意到 所述第一设备随后具有可用于其他设备(14,15,16,17)的所请求的第一内容; 或者将所述第一请求重新引导到服务器知道所请求的第一内容仍然可用的第三设备(13),并且从第三设备将满足所述第一选择标准的所述第一内容传送到所述第一设备; 或者当所述第一内容在所述第二设备上可用时,将满足所述第一选择标准的所述第一内容传送到所述第一设备,并且通知所述服务器所述第一内容已经从所述第二设备传送到所述第一设备; 并且当内容从这些中的一个转移时,奖励所述第二或第三设备从所述第一内容传送到所述第一设备的所述设备; 以及对所述第一设备进行充电以接收所述第一内容。 这可以下载,上传和共享受法律保护的付费内容。
    • 9. 发明申请
    • Integrity control for data stored in a non-volatile memory
    • 对存储在非易失性存储器中的数据的完整性控制
    • US20060155882A1
    • 2006-07-13
    • US10559174
    • 2004-05-26
    • Robert JochemsenNicolaas LambertWilhelmus Franciscus FontijnAdrianus Denissen
    • Robert JochemsenNicolaas LambertWilhelmus Franciscus FontijnAdrianus Denissen
    • G06F3/00
    • G06F11/1068G11C11/1675G11C11/1695G11C29/08G11C2029/4402
    • The present invention relates to a write controller (10) for a memory with a plurality of non-volatile storage cells, a read controller for a memory with a plurality of nonvolatile storage cells, to a combined write/read controller, to a solid state device comprising a memory with a plurality of non-volatile storage cells, a programmer device for writing a binary code to a non-volatile memory, to a method for writing data comprising at least one input bit to a memory having non-volatile storage cells, and to a method for controlling the integrity of data comprising at least one input bit stored in non-volatile storage cells of a memory. The invention provides a reliable detection of changes that have occurred to the content of a non-volatile memory. The basic concept of the present invention is to extend information stored in a non-volatile memory by at least one checking bit. The checking bit is allocated to one code bit, or to each of a plurality of code bits. The allocation is preferably reflected in an allocation of memory cells storing the input and code bits.
    • 本发明涉及一种用于具有多个非易失性存储单元的存储器的写入控制器(10),具有多个非易失性存储单元的存储器的读取控制器,组合的写/读控制器,固态 包括具有多个非易失性存储单元的存储器,用于将二进制代码写入非易失性存储器的编程器装置,用于将包括至少一个输入位的数据写入到具有非易失性存储单元的存储器的方法 以及用于控制数据的完整性的方法,包括存储在存储器的非易失性存储单元中的至少一个输入位。 本发明提供了对非易失性存储器的内容所发生的变化的可靠检测。 本发明的基本概念是通过至少一个检查位来扩展存储在非易失性存储器中的信息。 检查位分配给一个码位,或分配给多个码位中的每一个。 该分配优选地反映在存储输入和码位的存储单元的分配中。
    • 10. 发明授权
    • Method and apparatus for managing power consumption of a disk drive
    • 用于管理磁盘驱动器的功耗的方法和装置
    • US07075744B2
    • 2006-07-11
    • US10526872
    • 2003-08-08
    • Stephen Rodney CumpsonNicolaas Lambert
    • Stephen Rodney CumpsonNicolaas Lambert
    • G11B19/02
    • G06F1/3268G06F1/3203Y02D10/154
    • A method and apparatus for managing power consumption of consumer electronic devices that run on a battery or an accumulator, particularly portable applications such as mobile phones, laptops or MPEG players or recorders. They consist essentially of a host and a storage medium like a disk or means for receiving a storage medium like a disk drive that are coupled with an interface. Power management is very important because long battery life enhances user convenience. The invention determines whether it is more efficient either to leave the disk drive in the idle mode or to switch the drive to standby until the next data request appears. The disk drive is entered into the most efficient power mode. The time until the next request is determined by the host.
    • 用于管理在电池或蓄电池上运行的消费电子设备的功耗的方法和装置,特别是诸如移动电话,膝上型电脑或MPEG播放器或录像机的便携式应用。 它们基本上由主机和诸如磁盘的存储介质组成,或者用于接收诸如与接口耦合的磁盘驱动器的存储介质的装置。 电源管理非常重要,因为电池寿命长,增强了用户的便利性。 本发明确定是否更有效地将磁盘驱动器置于空闲模式或将驱动器切换到待机直到下一个数据请求出现。 磁盘驱动器进入最有效的电源模式。 直到下一个请求的时间由主机确定。