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1. 发明授权

US08422299B2 Non-volatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08422299B2
公开(公告)日：2013-04-16
申请号：US13091589
申请日：2011-04-21
申请人： Natsuki Iguchi , Takashi Maeda
发明人： Natsuki Iguchi , Takashi Maeda
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C16/10 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L29/7926
摘要： According to one embodiment, a non-volatile semiconductor memory device comprises memory strings. Each memory string comprises a semiconductor layer, control gates, a first selection gate, and a second selection gate. A semiconductor layer comprises a pair of pillar portions which extend in a vertical direction to a substrate, and a coupling portion formed to couple the pair of pillar portions. Control gates orthogonally intersect one of the pair of pillar portions or the other of the pair of pillar portions. A first selection gate orthogonally intersects one of the pair of pillar portions and is formed above the control gates. A second selection gate orthogonally intersects the other of the pair of pillar portions, is formed above the control gates, and is on the same level as the first selection gate as well as integrated with the first selection gate.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括存储器串。每个存储器串包括半导体层，控制栅极，第一选择栅极和第二选择栅极。半导体层包括在垂直方向上延伸到基板的一对柱部分和形成为耦合所述一对柱部分的联接部分。控制栅极与一对柱部分中的一个或一对柱部分中的另一个正交相交。第一选择栅极与一对柱部分中的一个正交相交并形成在控制栅极的上方。与控制栅极之间形成与第一选择栅极相同的第二选择栅极，与第一选择栅极集成，与第一选择栅极成一体。

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