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1. 发明授权

US5717862A Method and system for message status reporting in a multi-node network 失效
标题翻译：多节点网络中消息状态报告的方法和系统
公开(公告)号：US5717862A
公开(公告)日：1998-02-10
申请号：US429702
申请日：1995-04-27
申请人： Narasimhareddy L. Annapareddy , James Thomas Brady , Damon W. Finney , Richard F. Freitas , Michael Anthony Ko , Michael James Rayfield
发明人： Narasimhareddy L. Annapareddy , James Thomas Brady , Damon W. Finney , Richard F. Freitas , Michael Anthony Ko , Michael James Rayfield
IPC分类号： H04L12/56 , G06F13/00
CPC分类号： H04L47/10
摘要： A multi-nodal data processing system includes a plurality of processing nodes, each node connected to plural other nodes by bidirectional data links. Each node comprises receivers for receiving messages on bidirectional data links and transmitters for transmitting messages on bidirectional data links. Each node records child nodes to which a message was transmitted and is further adapted to transmit a lock-up message received from a child node to a parent node, the lock-up message indicating a successful establishment of a message signal path to a destination node. Each node further is adapted to transmit a link cancel signal to another node to close the link in the event of an unsuccessful message transfer attempt over the link. Each node inhibits transmission of a lock-up signal to a parent node until link cancel signals have been received from all child nodes (other than a node from which a lock-up signal was received). A source node (where a message originates) continues transmission of its message, even before a lock-up signal has been received. The destination node which originates the lock-up message terminates a bidirectional data link by an end-of-session signal when it has received an entire message.
摘要翻译：多节点数据处理系统包括多个处理节点，每个节点通过双向数据链路连接到多个其他节点。每个节点包括用于在双向数据链路上接收消息的接收机和用于在双向数据链路上发送消息的发射机。每个节点记录发送消息的子节点，并且进一步适于将从子节点接收的锁定消息发送到父节点，锁定消息指示成功建立到目的地节点的消息信号路径。每个节点进一步适于在另一节点上发送链路取消信号以在通过链路的不成功的消息传送尝试的情况下关闭链路。每个节点禁止向父节点发送锁定信号，直到从所有子节点（除了接收到锁定信号的节点）接收到链路消除信号为止。即使在接收到锁定信号之前，源节点（消息始发地）也继续发送其消息。当接收到整个消息时，发起锁定消息的目的地节点通过会话结束信号终止双向数据链路。

2. 发明授权

US5577211A System and method using chained structure queues for ordering of message delivery between connected nodes wherein unsuccessful message portion is skipped and retried 失效
标题翻译：使用链接结构队列的系统和方法，用于排序连接节点之间的消息传递，其中不成功的消息部分被跳过并重试
公开(公告)号：US5577211A
公开(公告)日：1996-11-19
申请号：US241920
申请日：1994-05-11
申请人： Narasimhareddy L. Annapareddy , James T. Brady , Damon W. Finney , Richard F. Freitas , Michael H. Hartung , Michael A. Ko , Noah R. Mendelsohn , Jaishankar M. Menon , David R. Nowlen , Shin-Yuan Tzou
发明人： Narasimhareddy L. Annapareddy , James T. Brady , Damon W. Finney , Richard F. Freitas , Michael H. Hartung , Michael A. Ko , Noah R. Mendelsohn , Jaishankar M. Menon , David R. Nowlen , Shin-Yuan Tzou
IPC分类号： G06F13/00 , H04L29/06 , G06F13/38 , G06F15/16
CPC分类号： H04L29/06
摘要： A computing system includes plural nodes that are connected by a communications network. Each node comprises a communications interface that enables an exchange of messages with other nodes. A ready queue is maintained in a node and includes plural message entries, each message entry indicating an output message control data structure. The node further includes memory for storing plural output message control data structures, each including one or more chained further monrtol data structures that define data comprising a message or a portion of a message that is to be dispatched. Control data structures that are chained from an output messsage control data structure exhibit a sequence dependincy. A processor is controlled by the ready queue and enables dispatch of portions of the message designated by an output message control data structure and associated further control structures. The processor prevents dispatch of one portion of a message prior to dispatch of another portion of the message upon which the first portion is dependent even if message transmissions are interrupted.
摘要翻译：计算系统包括通过通信网络连接的多个节点。每个节点包括能够与其他节点交换消息的通信接口。在节点中维护就绪队列，并且包括多个消息条目，每个消息条目指示输出消息控制数据结构。该节点还包括用于存储多个输出消息控制数据结构的存储器，每个包括一个或多个链接的另外的monrtol数据结构，该数据结构定义包括要发送的消息或消息的一部分的数据。从输出消息控制数据结构链接的控制数据结构表现出序列依赖性。处理器由就绪队列控制，并且使得能够分派由输出消息控制数据结构和相关联的进一步控制结构指定的消息的部分。即使消息传输被中断，处理器在发送消息的另一部分之前防止了第一部分依赖于消息的一部分的分派。

3. 发明授权

US5675736A Multi-node network with internode switching performed within processor nodes, each node separately processing data and control messages 失效
标题翻译：在节点间进行节点间切换的多节点网络，每个节点分别处理数据和控制消息
公开(公告)号：US5675736A
公开(公告)日：1997-10-07
申请号：US685770
申请日：1996-07-24
申请人： James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Paul Wayne Hunter , Michael Anthony Ko , Donald J. Lang , Noah R. Mendelsohn , Jaishankar Moothedath Menon , David Ronald Nowlen
发明人： James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Paul Wayne Hunter , Michael Anthony Ko , Donald J. Lang , Noah R. Mendelsohn , Jaishankar Moothedath Menon , David Ronald Nowlen
IPC分类号： G06F13/14 , G06F13/00 , G06F15/16 , G06F15/177 , H04L12/56 , H04L29/04 , H04L29/06
CPC分类号： H04L29/06 , H04L45/22 , H04L45/28 , H04L69/14
摘要： A distributed data processing system includes a plurality of nodes interconnected by bidirectional communication links. Each node includes a control message line for handling of control messages and a control memory for storing the control messages. Each node further includes data message line for handling of data messages and a data memory for storing the data messages. A processor in the node causes the data message line to queue and dispatch data messages from the data memory and the control message line to queue and dispatch control messages from the control memory. Each node includes N bidirectional communication links enabling the node to have at least twice as much input/output bandwidth as the control message line and data message line, combined. An input/output switch includes a routing processor and is coupled between the N bidirectional communication links, the data message line and control message line. The input/output switch dispatches either a control message or a data message over at least one of the bidirectional communication links in accordance with an output from the routing control processor, thereby enabling each communication link to carry either data or control messages. If a communication link is busy with either a control or a data message, the routing control processor increments to another communication link to enable dispatch of a queued message.
摘要翻译：分布式数据处理系统包括通过双向通信链路互连的多个节点。每个节点包括用于处理控制消息的控制消息线和用于存储控制消息的控制存储器。每个节点还包括用于处理数据消息的数据消息行和用于存储数据消息的数据存储器。节点中的处理器使得数据消息行从数据存储器和控制消息行排队和调度数据消息，以从控制存储器排队和调度控制消息。每个节点包括N个双向通信链路，使得该节点具有至少两倍于控制消息行和数据消息行的输入/输出带宽。输入/输出开关包括路由处理器，并且耦合在N个双向通信链路，数据消息线路和控制消息线路之间。输入/输出交换机根据来自路由控制处理器的输出，通过至少一个双向通信链路分派控制消息或数据消息，从而使得每个通信链路能够携带数据或控制消息。如果通信链路忙于控制或数据消息，则路由控制处理器递增到另一个通信链路以启用排队消息的分派。

4. 发明授权

US5784698A Dynamic memory allocation that enalbes efficient use of buffer pool memory segments 失效
标题翻译：动态内存分配，有效利用缓冲池内存段
公开(公告)号：US5784698A
公开(公告)日：1998-07-21
申请号：US568180
申请日：1995-12-05
申请人： James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Noah R. Mendelsohn , Jaishankar Moothedath Menon , David R. Nowlen
发明人： James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Noah R. Mendelsohn , Jaishankar Moothedath Menon , David R. Nowlen
IPC分类号： G06F9/50 , G06F12/02
CPC分类号： G06F9/5016 , G06F12/023
摘要： An apparatus for dynamically allocating memory includes a processor, a free buffer pool memory and a control memory which stores control block data structures. The control block data structures enable a segmentation of the free buffer pool memory into a series of free buffer pools, each free buffer pool comprising plural identical size buffers, each succeeding free buffer pool including a larger buffer size than a preceding free buffer pool. A selection size parameter for a given free buffer pool is a value that is larger than the buffer size comprising the given free buffer pool, but less than a next larger buffer size in the next of the series of free buffer pools. A memory allocation procedure responds to a request from an executing procedure for allocation of buffer space by: (i) allocating a buffer from a free buffer pool memory whose associated selection size parameter is a next larger value than the buffer space that was requested; (ii) determining a difference between the allocated buffer size and the requested buffer space to find an unfulfilled amount of the requested buffer space; (iii) allocating a buffer from a free buffer pool memory whose selection size parameter is a next larger value, among selection size parameters, than the unfulfilled amount; and (iv) repeating ii and iii until the memory allocation procedure determines that there is no unfulfilled amount of the requested buffer space. The apparatus further includes "quickcell" memory which is allocated without use of control block data structures.
摘要翻译：用于动态分配存储器的装置包括处理器，空闲缓冲池存储器和存储控制块数据结构的控制存储器。控制块数据结构使得可以将空闲缓冲池存储器分割成一系列空闲缓冲池，每个空闲缓冲池包括多个相同大小的缓冲器，每个随后的空闲缓冲池包括比先前的空闲缓冲池大的缓冲器大小。给定可用缓冲池的选择大小参数是大于包含给定可用缓冲池的缓冲区大小的值，但小于下一个空闲缓冲池系列中的下一个较大缓冲区大小的值。存储器分配过程响应来自用于分配缓冲器空间的执行过程的请求，其通过以下步骤来响应：（i）从相关选择大小参数是比所请求的缓冲空间更大的值的空闲缓冲池存储器分配缓冲器; （ii）确定所分配的缓冲器大小与所请求的缓冲器空间之间的差异，以找到所请求的缓冲空间的未实现量; （iii）从选择大小参数中选择大小参数为选择大小参数的空闲缓冲池存储器中分配缓冲器，而不是未实现的量; 和（iv）重复ii和iii，直到存储器分配过程确定没有未实现的所请求的缓冲空间量。该装置还包括在不使用控制块数据结构的情况下分配的“快速小区”存储器。

5. 发明授权

US5940612A System and method for queuing of tasks in a multiprocessing system 失效
标题翻译：在多处理系统中排队任务的系统和方法
公开(公告)号：US5940612A
公开(公告)日：1999-08-17
申请号：US534585
申请日：1995-09-27
申请人： James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Noah R. Mendelsohn , Jaishankar Moothedath Menon , David R. Nowlen
发明人： James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Noah R. Mendelsohn , Jaishankar Moothedath Menon , David R. Nowlen
IPC分类号： G06F9/46 , G06F9/48 , G06F9/00
CPC分类号： G06F9/4881
摘要： A procedure controls execution of priority ordered tasks in a multi-nodel data processing system. The data processing system includes a node with a software-controlled processor and a hardware-configured queue-controller. The queue-controller includes a plurality of priority-ordered queues, each queue listing tasks having an assigned priority equal to a priority order assigned to the queue. The queue-controller responds to a processor generated order to queue a first task for execution, by performing a method which includes the steps of: listing said first task on a first queue having an assigned priority that is equal to a priority of said first task; if a second task is listed on a queue having a higher assigned priority, attempting execution of the second task before execution of the first task; if no tasks are listed on a queue having a higher assigned priority than said first queue, attempting execution of a first listed task in the first queue means; and upon completion of execution of the task or a stalling of execution of the task, attempting execution of a further task on the first queue only if another order has not been issued to place a task on a queue having a higher assigned priority. The method further handles chained subtasks by attempting execution of each subtask of a task in response to the processor generated order; and if execution of any subtask does not complete, attempting execution of another task in lieu of a subtask chained to the subtask that did not complete.
摘要翻译：程序控制多节点数据处理系统中优先级排序任务的执行。数据处理系统包括具有软件控制处理器和硬件配置的队列控制器的节点。队列控制器包括多个优先级排序队列，每个队列列出具有分配给队列的优先顺序的分配优先级的任务。队列控制器响应于处理器生成的顺序来排队第一任务以执行，方法是执行一种方法，该方法包括以下步骤：在具有等于所述第一任务的优先级的分配优先级的第一队列上列出所述第一任务 ; 如果在具有较高分配优先级的队列中列出第二任务，则在执行第一任务之前尝试执行第二任务; 如果在具有比所述第一队列更高的分配优先级的队列上列出任务，则尝试执行第一队列中的第一列出的任务; 并且在完成执行任务或停止执行任务时，只有当尚未发出另一个订单以将任务放置在具有较高分配优先级的队列上时，才尝试在第一队列上执行另外的任务。该方法通过响应于处理器生成的顺序尝试执行任务的每个子任务来进一步处理链接子任务; 并且如果任何子任务的执行未完成，则尝试执行另一任务代替链接到未完成的子任务的子任务。

6. 发明授权

US5857213A Method for extraction of a variable length record from fixed length sectors on a disk drive and for reblocking remaining records in a disk track 失效
标题翻译：从磁盘驱动器上的固定长度扇区提取可变长度记录并重新锁定磁盘轨道中剩余记录的方法
公开(公告)号：US5857213A
公开(公告)日：1999-01-05
申请号：US761639
申请日：1996-12-06
申请人： Michael T. Benhase , James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Donald J. Lang , Jaishankar Moothedath Menon
发明人： Michael T. Benhase , James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Donald J. Lang , Jaishankar Moothedath Menon
IPC分类号： G06F3/06 , G06F12/02
CPC分类号： G06F3/0608 , G06F3/064 , G06F3/0689
摘要： A method enables a host processor, which employs variable length (VL) records, to communicate with disk storage which employs fixed length (FL) sectors for storage of the VL records. The method comprises the steps of: a) deriving a first control data structure for an update VL record, the first control data structure including information describing segments of the update VL record; b) determining a disk track that includes a FL sector wherein am old VL record commences that corresponds to the update VL record; c) reading each FL sector in the disk track and creating a control data structure which includes information describing each VL record stored in the disk track; d) substituting in a control data structure for the old VL record that corresponds to the update VL record, information regarding update data from the first control data structure; e) recording in the disk track, data indicated by each control data structure determined in steps c) and d); and f) if the old VL record ends at other than a sector break of a FL sector, reblocking VL records into FL sectors which are recorded thereafter on the disk track. The invention also enables a read action to be accomplished in one rotation of a disk even though it commences at a FL sector that is not at the beginning of a VL record to be accessed.
摘要翻译：一种方法使得采用可变长度（VL）记录的主机处理器与采用固定长度（FL）扇区的磁盘存储器通信以存储VL记录。该方法包括以下步骤：a）导出更新VL记录的第一控制数据结构，所述第一控制数据结构包括描述更新VL记录段的信息; b）确定包括FL扇区的磁盘轨道，其中旧的VL记录开始对应于更新VL记录; c）读取磁盘轨道中的每个FL扇区并创建包括描述存储在磁盘轨道中的每个VL记录的信息的控制数据结构; d）用对应于更新VL记录的旧VL记录的控制数据结构替换关于来自第一控制数据结构的更新数据的信息; e）在盘轨道中记录由步骤c）和d）中确定的每个控制数据结构指示的数据; 以及f）如果旧的VL记录在FL扇区的扇区断点之外结束，则将VL记录重新锁定到其后记录在磁盘轨道上的FL扇区中。本发明还使得能够在盘的一次旋转中实现读取动作，即使其在不在要访问的VL记录的开始处的FL扇区处开始。

7. 发明授权

US6101194A Conflict resolution in multi-node communication network 失效
标题翻译：多节点通信网络中的冲突解决
公开(公告)号：US6101194A
公开(公告)日：2000-08-08
申请号：US871165
申请日：1997-06-09
申请人： Narasimha Lakshmi Annapareddy , James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Jai M. Menon , David Ronald Nowlen
发明人： Narasimha Lakshmi Annapareddy , James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Jai M. Menon , David Ronald Nowlen
IPC分类号： H04J3/02 , H04L29/06 , H04L29/08
CPC分类号： H04L29/06 , H04L29/08
摘要： Conflicts are resolved between competing nodes in a multi-node communications network. After a first node in the network requests an initiation of communications with a target node, the requesting node may simply initiate the requested communications with the target node if the target node is not busy. If the first node determines that the target node is busy, it proceeds to resolve the conflict. Namely, the first node repeats the process of waiting for a first delay then requesting initiation of communications with the target node. After each unsuccessful attempt, the first delay is successively increased. As an example, the delay may be increased exponentially, with a controlled randomness added. After a or more queued messages to other nodes. Following this, the first node performs another sequence to initiate communications with the target node, successively increasing the delay between unsuccessful attempts, as before. After a predetermined number of unsuccessful passes through the foregoing routine, the first node proceeds to take appropriate action, such as initiating an error recovery routine, sending the message via different hardware components, or issuing an error message.
摘要翻译：冲突在多节点通信网络中的竞争节点之间解决。在网络中的第一节点请求启动与目标节点的通信之后，如果目标节点不忙，请求节点可以简单地发起与目标节点的所请求的通信。如果第一个节点确定目标节点正在忙，则会继续解决冲突。也就是说，第一节点重复等待第一延迟的处理，然后请求发起与目标节点的通信。在每次不成功的尝试后，第一个延迟连续增加。作为示例，延迟可以以指数方式增加，并且增加受控的随机性。将一个或多个排队的消息发送到其他节点。此后，第一个节点执行另一个序列以启动与目标节点的通信，如以前一样，连续增加不成功尝试之间的延迟。在通过上述例程的预定数量的不成功通过之后，第一节点继续采取适当的动作，例如启动错误恢复例程，经由不同硬件组件发送消息或发出错误消息。

8. 发明授权

US5860088A Method for extraction of a variable length record from fixed length sectors on a disk drive 失效
标题翻译：从磁盘驱动器上的固定长度扇区提取可变长度记录的方法
公开(公告)号：US5860088A
公开(公告)日：1999-01-12
申请号：US761719
申请日：1996-12-06
申请人： Michael T. Benhase , James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Donald J. Lang , Jaishankar Moothedath Menon
发明人： Michael T. Benhase , James Thomas Brady , Damon W. Finney , Michael Howard Hartung , Michael Anthony Ko , Donald J. Lang , Jaishankar Moothedath Menon
IPC分类号： G06F3/06 , G06F12/02
CPC分类号： G06F3/0608 , G06F3/064 , G06F3/0661 , G06F3/0689
摘要： A method enables a host processor, which employs variable length (VL) records, to transparently communicate with disk storage which employs fixed length (FL) sectors for storage of the VL records. The method comprises the steps of: a) deriving a first control data structure for an update VL record, the first control data structure including information describing segments of the update VL record; b) determining an FL sector wherein an old VL record commences that corresponds to the update VL record; c) if the old VL record commences at other than a sector break of the FL sector, deriving a second control data structure for a portion of a prior VL record that immediately precedes the old VL record and a third control data structure for the old VL record; d) substituting in the third control data structure, information regarding update segments of the update VL record from the first control data structure; and recording in the FL sector determined in c), data indicated by the second control data structure and at least a portion of the update VL record, through use of the third control structure as altered in d).
摘要翻译：一种方法使得采用可变长度（VL）记录的主机处理器与采用固定长度（FL）扇区的磁盘存储器透明地通信以存储VL记录。该方法包括以下步骤：a）导出更新VL记录的第一控制数据结构，所述第一控制数据结构包括描述更新VL记录段的信息; b）确定FL扇区，其中旧VL记录开始对应于更新VL记录; c）如果旧的VL记录在FL扇区的扇区之外开始，则导出紧邻旧VL记录之前的先前VL记录的一部分的第二控制数据结构，以及旧VL的第三控制数据结构记录; d）在第三控制数据结构中替换关于来自第一控制数据结构的更新VL记录的更新段的信息; 并且通过使用在d）中改变的第三控制结构，在c）确定的FL扇区中记录由第二控制数据结构指示的数据和更新VL记录的至少一部分。

9. 发明授权

US5603044A Interconnection network for a multi-nodal data processing system which exhibits incremental scalability 失效
标题翻译：具有增量可扩展性的多节点数据处理系统的互连网络
公开(公告)号：US5603044A
公开(公告)日：1997-02-11
申请号：US385761
申请日：1995-02-08
申请人： Narasimhareddy L. Annapareddy , Damon W. Finney , Michael O. Jenkins , Larry B. Kessler , Donald J. Lang , Song C. Liang , David N. Mora , David A. Plomgren , Peter P. Urbisci , Andrew D. Walls
发明人： Narasimhareddy L. Annapareddy , Damon W. Finney , Michael O. Jenkins , Larry B. Kessler , Donald J. Lang , Song C. Liang , David N. Mora , David A. Plomgren , Peter P. Urbisci , Andrew D. Walls
IPC分类号： G06F15/173 , G06F1/18 , G06F13/40 , G06F9/02
CPC分类号： G06F13/409
摘要： An interconnection network comprises a pair of backplanes for receiving X pluggable node cards. The pair of backplanes include X backplane connector groups, each backplane connector group adapted to receive mating connectors from a pluggable node card. Each backplane connector group includes X/2 connectors. A first backplane includes first permanent wiring which interconnects a first subset of pairs of connectors between backplane connector groups. A second backplane includes second permanent wiring which interconnects a second subset of pairs of connectors between backplane connector groups. The first permanent wiring and second permanent wiring connect complementary subsets' of pairs of the connectors. A plurality of node cards, each including a card connector group, pluggably mate with the backplane connector groups. Each node card further includes a frontal connector that is adapted to receive a cable interconnection. Each node card includes a processor and a switch module which simultaneously connects the processor to at least plural connectors of a backplane connector group.
摘要翻译：互连网络包括用于接收X个可插拔节点卡的一对背板。该对背板包括X个背板连接器组，每个背板连接器组适于从可插拔节点卡接收配对连接器。每个背板连接器组包括X / 2连接器。第一背板包括将背板连接器组之间的第一对连接器对互连的第一永久布线。第二背板包括第二永久布线，其将背板连接器组之间的第二对连接器对互连。第一个永久布线和第二个永久布线连接了连接器对的互补子集。多个节点卡，各自包括卡连接器组，可插拔地与背板连接器组配合。每个节点卡还包括适于接收电缆互连的正面连接器。每个节点卡包括处理器和开关模块，其将处理器同时连接到背板连接器组的至少多个连接器。

10. 发明授权

US5712856A Method and apparatus for testing links between network switches 失效
标题翻译：用于测试网络交换机之间链路的方法和装置
公开(公告)号：US5712856A
公开(公告)日：1998-01-27
申请号：US749880
申请日：1996-11-15
申请人： Damon W. Finney , Michael James Rayfield
发明人： Damon W. Finney , Michael James Rayfield
IPC分类号： G06F11/22 , G06F13/00 , H04L12/26 , H04L29/06 , H04L29/14 , H04M3/22 , G01R31/28 , G06F11/00
CPC分类号： H04L43/50 , H04L12/2697 , H04L29/06 , H04L69/03
摘要： A test link protocol which continuously monitors each link in a network to ensure that the link is correctly transmitting data. Each switch, or torus has at least one of two functional components: Send Test and Receive Test. The Send Test component monitors control codes at a torus link output. The Receive Test component monitors control codes at a torus link input. After a predetermined interval, the Send Test component makes a request to send a test.sub.-- link control code. The torus sends the test.sub.-- link code to the neighboring torus, where it is removed from the data stream and sent to that torus' Receive Test. The Receive Test then generates a response message and makes a request to send that message back to the originating torus. After receiving the message, the Send Test analyzes the message to determine whether the network link is working correctly. An error is also declared if the Send Test does not receive a reply within a predetermined interval.
摘要翻译：一种连续监视网络中每个链路以确保链路正确传输数据的测试链路协议。每个开关或环面至少有两个功能组件之一：发送测试和接收测试。发送测试组件监视环面链路输出端的控制代码。接收测试组件监视环面连接输入端的控制代码。在预定的时间间隔之后，发送测试组件请求发送测试链接控制代码。环形天线将测试链接代码发送到相邻的环面，从数据流中删除并发送到该环面的“接收测试”。接收测试然后生成一个响应消息，并发出请求将该消息发送回原始环面。收到消息后，发送测试分析消息以确定网络链路是否正常工作。如果发送测试没有在预定的时间间隔内收到回复，也会声明错误。

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