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    • 6. 发明授权
    • Method of extracting interconnection capacitance of semiconductor integrated chip and recording medium for recording the same
    • 提取半导体集成芯片的互连电容和记录介质的方法
    • US06816999B2
    • 2004-11-09
    • US10266604
    • 2002-10-09
    • Keun-ho Lee
    • Keun-ho Lee
    • G06F1750
    • H01L21/76819G06F17/5036H01L21/76838H01L23/5222H01L2924/0002H01L2924/00
    • A method of extracting the interconnection capacitance of a semiconductor integrated circuit is provided. An interconnection structure composed of a plurality of signal lines and dummy conductive patterns disposed between the signal lines is made into data. Data on interconnection structure primitives, which are made by changing portions of the dummy patterns into high-k dielectric materials is generated based on the interconnection structure data. Capacitance of the interconnection structure is then extracted by inputting data on the interconnection structure primitives to an RC extractor and operating the data. According to this method, extracting interconnection capacitance is easily applied to various types of RC extractors. Moreover, the time required to extract the interconnection capacitance is reduced.
    • 提供一种提取半导体集成电路的互连电容的方法。 将由多个信号线构成的互连结构和设置在信号线之间的虚设导电图案形成数据。 基于互连结构数据生成通过将虚拟图案的部分改变为高k电介质材料而制成的互连结构图元上的数据。 然后通过将互连结构图元上的数据输入到RC提取器并操作数据来提取互连结构的电容。 根据该方法,提取互连电容容易地应用于各种类型的RC提取器。 此外,提取互连电容所需的时间减少。